From patchwork Wed Jun 2 02:07:37 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zou, Nanhai" X-Patchwork-Id: 103685 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by demeter.kernel.org (8.14.3/8.14.3) with ESMTP id o5227tRC027706 for ; Wed, 2 Jun 2010 02:08:32 GMT Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D0A269EC9B for ; Tue, 1 Jun 2010 19:07:54 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 792919E78F for ; Tue, 1 Jun 2010 19:07:44 -0700 (PDT) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP; 01 Jun 2010 19:04:12 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.53,343,1272870000"; d="scan'208";a="626696483" Received: from unknown (HELO hdmi.sh.intel.com) ([10.239.36.90]) by orsmga001.jf.intel.com with ESMTP; 01 Jun 2010 19:07:19 -0700 From: Zou Nan hai To: Anholt Eric , intel-gfx Date: Wed, 2 Jun 2010 10:07:37 +0800 Message-Id: <1275444457-10763-1-git-send-email-nanhai.zou@intel.com> X-Mailer: git-send-email 1.7.1 Subject: [Intel-gfx] [PATCH] libdrm exec on BSD ring buffer X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.11 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Wed, 02 Jun 2010 02:08:32 +0000 (UTC) diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h index c8cb3a6..88ba040 100644 --- a/include/drm/i915_drm.h +++ b/include/drm/i915_drm.h @@ -275,6 +275,7 @@ typedef struct drm_i915_irq_wait { #define I915_PARAM_HAS_OVERLAY 7 #define I915_PARAM_HAS_PAGEFLIPPING 8 #define I915_PARAM_HAS_EXECBUF2 9 +#define I915_PARAM_HAS_BSD 10 typedef struct drm_i915_getparam { int param; @@ -616,7 +617,9 @@ struct drm_i915_gem_execbuffer2 { __u32 num_cliprects; /** This is a struct drm_clip_rect *cliprects */ __u64 cliprects_ptr; - __u64 flags; /* currently unused */ +#define I915_EXEC_RENDER (1 << 0) +#define I915_EXEC_BSD (1 << 1) + __u64 flags; __u64 rsvd1; __u64 rsvd2; }; diff --git a/intel/intel_bufmgr.c b/intel/intel_bufmgr.c index 9144fdd..2b4e888 100644 --- a/intel/intel_bufmgr.c +++ b/intel/intel_bufmgr.c @@ -145,6 +145,19 @@ drm_intel_bo_exec(drm_intel_bo *bo, int used, return bo->bufmgr->bo_exec(bo, used, cliprects, num_cliprects, DR4); } +int +drm_intel_bo_mrb_exec(drm_intel_bo *bo, int used, + drm_clip_rect_t *cliprects, int num_cliprects, int DR4, + int ring_flag) +{ + if (bo->bufmgr->bo_mrb_exec) + return bo->bufmgr->bo_mrb_exec(bo, used, + cliprects, num_cliprects, DR4, + ring_flag); + + return -ENODEV; +} + void drm_intel_bufmgr_set_debug(drm_intel_bufmgr *bufmgr, int enable_debug) { bufmgr->debug = enable_debug; diff --git a/intel/intel_bufmgr.h b/intel/intel_bufmgr.h index cbcddb6..65fd603 100644 --- a/intel/intel_bufmgr.h +++ b/intel/intel_bufmgr.h @@ -106,6 +106,9 @@ void drm_intel_bufmgr_set_debug(drm_intel_bufmgr *bufmgr, int enable_debug); void drm_intel_bufmgr_destroy(drm_intel_bufmgr *bufmgr); int drm_intel_bo_exec(drm_intel_bo *bo, int used, drm_clip_rect_t * cliprects, int num_cliprects, int DR4); +int drm_intel_bo_mrb_exec(drm_intel_bo *bo, int used, + drm_clip_rect_t *cliprects, int num_cliprects, int DR4, + int ring_flag); int drm_intel_bufmgr_check_aperture_space(drm_intel_bo ** bo_array, int count); int drm_intel_bo_emit_reloc(drm_intel_bo *bo, uint32_t offset, diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c index b76fd7e..398c7d0 100644 --- a/intel/intel_bufmgr_gem.c +++ b/intel/intel_bufmgr_gem.c @@ -1530,14 +1530,17 @@ drm_intel_gem_bo_exec(drm_intel_bo *bo, int used, } static int -drm_intel_gem_bo_exec2(drm_intel_bo *bo, int used, - drm_clip_rect_t *cliprects, int num_cliprects, - int DR4) +drm_intel_gem_bo_mrb_exec2(drm_intel_bo *bo, int used, + drm_clip_rect_t *cliprects, int num_cliprects, int DR4, + int ring_flag) { drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *)bo->bufmgr; struct drm_i915_gem_execbuffer2 execbuf; int ret, i; + if ((ring_flag != I915_EXEC_RENDER) && (ring_flag != I915_EXEC_BSD)) + return -EINVAL; + pthread_mutex_lock(&bufmgr_gem->lock); /* Update indices and set up the validate list. */ drm_intel_gem_bo_process_reloc2(bo); @@ -1555,7 +1558,7 @@ drm_intel_gem_bo_exec2(drm_intel_bo *bo, int used, execbuf.num_cliprects = num_cliprects; execbuf.DR1 = 0; execbuf.DR4 = DR4; - execbuf.flags = 0; + execbuf.flags = ring_flag; execbuf.rsvd1 = 0; execbuf.rsvd2 = 0; @@ -1597,6 +1600,16 @@ drm_intel_gem_bo_exec2(drm_intel_bo *bo, int used, } static int +drm_intel_gem_bo_exec2(drm_intel_bo *bo, int used, + drm_clip_rect_t *cliprects, int num_cliprects, + int DR4) +{ + return drm_intel_gem_bo_mrb_exec2(bo, used, + cliprects, num_cliprects, DR4, + I915_EXEC_RENDER); +} + +static int drm_intel_gem_bo_pin(drm_intel_bo *bo, uint32_t alignment) { drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; @@ -1974,7 +1987,7 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size) drm_i915_getparam_t gp; int ret, i; unsigned long size; - int exec2 = 0; + int exec2 = 0, has_bsd = 0; bufmgr_gem = calloc(1, sizeof(*bufmgr_gem)); if (bufmgr_gem == NULL) @@ -2023,6 +2036,11 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size) if (!ret) exec2 = 1; + gp.param = I915_PARAM_HAS_BSD; + ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp); + if (!ret) + has_bsd = 1; + if (bufmgr_gem->gen < 4) { gp.param = I915_PARAM_NUM_FENCES_AVAIL; gp.value = &bufmgr_gem->available_fences; @@ -2076,9 +2094,11 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size) bufmgr_gem->bufmgr.bo_set_tiling = drm_intel_gem_bo_set_tiling; bufmgr_gem->bufmgr.bo_flink = drm_intel_gem_bo_flink; /* Use the new one if available */ - if (exec2) + if (exec2) { bufmgr_gem->bufmgr.bo_exec = drm_intel_gem_bo_exec2; - else + if (has_bsd) + bufmgr_gem->bufmgr.bo_mrb_exec = drm_intel_gem_bo_mrb_exec2; + } else bufmgr_gem->bufmgr.bo_exec = drm_intel_gem_bo_exec; bufmgr_gem->bufmgr.bo_busy = drm_intel_gem_bo_busy; bufmgr_gem->bufmgr.bo_madvise = drm_intel_gem_bo_madvise; diff --git a/intel/intel_bufmgr_priv.h b/intel/intel_bufmgr_priv.h index f987d97..87e91e7 100644 --- a/intel/intel_bufmgr_priv.h +++ b/intel/intel_bufmgr_priv.h @@ -173,6 +173,13 @@ struct _drm_intel_bufmgr { drm_clip_rect_t *cliprects, int num_cliprects, int DR4); + /** Executes the command buffer pointed to by bo on the selected + * ring buffer + */ + int (*bo_mrb_exec) (drm_intel_bo *bo, int used, + drm_clip_rect_t *cliprects, int num_cliprects, + int DR4, int ring_flag); + /** * Pin a buffer to the aperture and fix the offset until unpinned *