From patchwork Wed Sep 1 20:29:53 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 147401 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id o81KVWHv015494 for ; Wed, 1 Sep 2010 20:32:28 GMT Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 03FD69ECE1 for ; Wed, 1 Sep 2010 13:31:32 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail.ffwll.ch (cable-static-49-187.intergga.ch [157.161.49.187]) by gabe.freedesktop.org (Postfix) with ESMTP id 10A1F9EAFD for ; Wed, 1 Sep 2010 13:28:27 -0700 (PDT) Received: by mail.ffwll.ch (Postfix, from userid 1000) id E459220C210; Wed, 1 Sep 2010 22:30:38 +0200 (CEST) X-Spam-ASN: X-Spam-Checker-Version: SpamAssassin 3.2.5 (2008-06-10) on orange.ffwll.ch X-Spam-Level: X-Spam-Hammy: 0.000-+--H*UA:git-send-email, 0.000-+--H*x:git-send-email, 0.000-+--H*x:1.7.1 X-Spam-Status: No, score=-4.8 required=6.0 tests=ALL_TRUSTED,AWL,BAYES_00, USER_SAXASTIC autolearn=ham version=3.2.5 X-Spam-Spammy: 0.961-+--H*m:ffwll, 0.961-+--H*r:mail.ffwll.ch, 0.946-+--H*Ad:U*daniel.vetter Received: from viiv.ffwll.ch (viiv.ffwll.ch [192.168.23.128]) by mail.ffwll.ch (Postfix) with ESMTP id 7C41B20C242; Wed, 1 Sep 2010 22:30:18 +0200 (CEST) Received: from daniel by viiv.ffwll.ch with local (Exim 4.72) (envelope-from ) id 1Oqtwo-0000Mh-8p; Wed, 01 Sep 2010 22:30:18 +0200 From: Daniel Vetter To: intel-gfx@lists.freedesktop.org Date: Wed, 1 Sep 2010 22:29:53 +0200 Message-Id: <1283373010-1314-7-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1283373010-1314-1-git-send-email-daniel.vetter@ffwll.ch> References: <1283373010-1314-1-git-send-email-daniel.vetter@ffwll.ch> Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 06/23] intel-gtt: new function intel_gtt_mappable_entries X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.11 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Wed, 01 Sep 2010 20:32:33 +0000 (UTC) diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c index f5889a9..33d8460 100644 --- a/drivers/char/agp/intel-gtt.c +++ b/drivers/char/agp/intel-gtt.c @@ -725,6 +725,7 @@ static unsigned int intel_gtt_stolen_entries(void) break; } } + if (!local && gtt_entries > intel_max_stolen) { dev_info(&intel_private.bridge_dev->dev, "detected %dK stolen memory, trimming to %dK\n", @@ -743,6 +744,52 @@ static unsigned int intel_gtt_stolen_entries(void) return gtt_entries; } +static unsigned int intel_gtt_total_entries(void) +{ + return 0; +} + +static unsigned int intel_gtt_mappable_entries(void) +{ + unsigned int aperture_size; + u16 gmch_ctrl; + + aperture_size = 1024 * 1024; + + pci_read_config_word(intel_private.bridge_dev, + I830_GMCH_CTRL, &gmch_ctrl); + + switch (intel_private.pcidev->device) { + case PCI_DEVICE_ID_INTEL_82830_CGC: + case PCI_DEVICE_ID_INTEL_82845G_IG: + case PCI_DEVICE_ID_INTEL_82855GM_IG: + case PCI_DEVICE_ID_INTEL_82865_IG: + if ((gmch_ctrl & I830_GMCH_MEM_MASK) == I830_GMCH_MEM_64M) + aperture_size *= 64; + else + aperture_size *= 128; + break; + default: + /* 9xx supports large sizes, just look at the length */ + aperture_size = pci_resource_len(intel_private.pcidev, 2); + break; + } + + return aperture_size >> PAGE_SHIFT; +} + +static int intel_gtt_init(void) +{ + /* we have to call this as early as possible after the MMIO base address is known */ + intel_private.base.gtt_stolen_entries = intel_gtt_stolen_entries(); + if (intel_private.base.gtt_stolen_entries == 0) { + iounmap(intel_private.registers); + return -ENOMEM; + } + + return 0; +} + static void intel_i830_fini_flush(void) { kunmap(intel_private.i8xx_page); @@ -795,7 +842,7 @@ static void intel_i830_chipset_flush(struct agp_bridge_data *bridge) */ static int intel_i830_create_gatt_table(struct agp_bridge_data *bridge) { - int page_order; + int page_order, ret; struct aper_size_info_fixed *size; int num_entries; u32 temp; @@ -815,12 +862,9 @@ static int intel_i830_create_gatt_table(struct agp_bridge_data *bridge) temp = readl(intel_private.registers+I810_PGETBL_CTL) & 0xfffff000; global_cache_flush(); /* FIXME: ?? */ - /* we have to call this as early as possible after the MMIO base address is known */ - intel_private.base.gtt_stolen_entries = intel_gtt_stolen_entries(); - if (intel_private.base.gtt_stolen_entries == 0) { - iounmap(intel_private.registers); - return -ENOMEM; - } + ret = intel_gtt_init(); + if (ret != 0) + return ret; agp_bridge->gatt_table = NULL; @@ -1272,7 +1316,7 @@ static int intel_i915_get_gtt_size(void) */ static int intel_i915_create_gatt_table(struct agp_bridge_data *bridge) { - int page_order; + int page_order, ret; struct aper_size_info_fixed *size; int num_entries; u32 temp, temp2; @@ -1305,12 +1349,10 @@ static int intel_i915_create_gatt_table(struct agp_bridge_data *bridge) temp = readl(intel_private.registers+I810_PGETBL_CTL) & 0xfffff000; global_cache_flush(); /* FIXME: ? */ - /* we have to call this as early as possible after the MMIO base address is known */ - intel_private.base.gtt_stolen_entries = intel_gtt_stolen_entries(); - if (intel_private.base.gtt_stolen_entries == 0) { + ret = intel_gtt_init(); + if (ret != 0) { iounmap(intel_private.gtt); - iounmap(intel_private.registers); - return -ENOMEM; + return ret; } agp_bridge->gatt_table = NULL; @@ -1395,7 +1437,7 @@ static void intel_i965_get_gtt_range(int *gtt_offset, int *gtt_size) */ static int intel_i965_create_gatt_table(struct agp_bridge_data *bridge) { - int page_order; + int page_order, ret; struct aper_size_info_fixed *size; int num_entries; u32 temp; @@ -1428,12 +1470,10 @@ static int intel_i965_create_gatt_table(struct agp_bridge_data *bridge) temp = readl(intel_private.registers+I810_PGETBL_CTL) & 0xfffff000; global_cache_flush(); /* FIXME: ? */ - /* we have to call this as early as possible after the MMIO base address is known */ - intel_private.base.gtt_stolen_entries = intel_gtt_stolen_entries(); - if (intel_private.base.gtt_stolen_entries == 0) { + ret = intel_gtt_init(); + if (ret != 0) { iounmap(intel_private.gtt); - iounmap(intel_private.registers); - return -ENOMEM; + return ret; } agp_bridge->gatt_table = NULL; @@ -1737,6 +1777,11 @@ int intel_gmch_probe(struct pci_dev *pdev, pci_set_consistent_dma_mask(intel_private.pcidev, DMA_BIT_MASK(mask)); + if (bridge->driver == &intel_810_driver) + return 1; + + intel_private.base.gtt_mappable_entries = intel_gtt_mappable_entries(); + return 1; } EXPORT_SYMBOL(intel_gmch_probe);