From patchwork Sat Oct 9 07:32:23 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Xiang, Haihao" X-Patchwork-Id: 243141 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id o997Y6fm005239 for ; Sat, 9 Oct 2010 07:34:27 GMT Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DA8219E849 for ; Sat, 9 Oct 2010 00:34:06 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [143.182.124.21]) by gabe.freedesktop.org (Postfix) with ESMTP id 0511C9E7EA for ; Sat, 9 Oct 2010 00:32:51 -0700 (PDT) Received: from azsmga001.ch.intel.com ([10.2.17.19]) by azsmga101.ch.intel.com with ESMTP; 09 Oct 2010 00:32:51 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.57,307,1283756400"; d="scan'208";a="334055521" Received: from xhh-ilk32.sh.intel.com (HELO localhost.localdomain) ([10.239.36.8]) by azsmga001.ch.intel.com with ESMTP; 09 Oct 2010 00:32:51 -0700 From: "Xiang, Haihao" To: intel-gfx@lists.freedesktop.org Date: Sat, 9 Oct 2010 15:32:23 +0800 Message-Id: <1286609550-16083-4-git-send-email-haihao.xiang@intel.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1286609550-16083-1-git-send-email-haihao.xiang@intel.com> References: <1286609550-16083-1-git-send-email-haihao.xiang@intel.com> Subject: [Intel-gfx] [PATCH 03/10] always set destination horiz stride for Align16 to 1 on Sandybridge. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.11 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Sat, 09 Oct 2010 07:34:27 +0000 (UTC) diff --git a/src/brw_structs.h b/src/brw_structs.h index ba20547..32a52df 100644 --- a/src/brw_structs.h +++ b/src/brw_structs.h @@ -1102,7 +1102,7 @@ struct brw_instruction GLuint dest_writemask:4; GLuint dest_subreg_nr:1; GLuint dest_reg_nr:8; - GLuint pad1:2; + GLuint dest_horiz_stride:2; GLuint dest_address_mode:1; } da16; @@ -1116,7 +1116,7 @@ struct brw_instruction GLuint dest_writemask:4; GLint dest_indirect_offset:6; GLuint dest_subreg_nr:3; - GLuint pad1:2; + GLuint dest_horiz_stride:2; GLuint dest_address_mode:1; } ia16; } bits1; diff --git a/src/gram.y b/src/gram.y index 438559a..f57e97c 100644 --- a/src/gram.y +++ b/src/gram.y @@ -1668,6 +1668,7 @@ int set_instruction_dest(struct brw_instruction *instr, instr->bits1.da16.dest_subreg_nr = dest->subreg_nr; instr->bits1.da16.dest_reg_nr = dest->reg_nr; instr->bits1.da16.dest_address_mode = dest->address_mode; + instr->bits1.da16.dest_horiz_stride = 1; instr->bits1.da16.dest_writemask = dest->writemask; } else if (instr->header.access_mode == BRW_ALIGN_1) { instr->bits1.ia1.dest_reg_file = dest->reg_file; @@ -1687,6 +1688,7 @@ int set_instruction_dest(struct brw_instruction *instr, instr->bits1.ia16.dest_subreg_nr = dest->address_subreg_nr; instr->bits1.ia16.dest_writemask = dest->writemask; instr->bits1.ia16.dest_indirect_offset = dest->indirect_offset; + instr->bits1.ia16.dest_horiz_stride = 1; instr->bits1.ia16.dest_address_mode = dest->address_mode; }