[4/4] drm/i915: move sandybridge RC6 enable in resume after ring initialization

Commit Message

Zhenyu Wang March 23, 2011, 2:21 a.m. UTC

None

Patch

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 22ec066..e675ba9 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -378,6 +378,9 @@  static int i915_drm_thaw(struct drm_device *dev)
 
 		if (IS_IRONLAKE_M(dev))
 			ironlake_enable_rc6(dev);
+
+		if (IS_GEN6(dev))
+			gen6_enable_rps(dev_priv);
 	}
 
 	intel_opregion_init(dev);
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index bce24d8..08c1d04 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -875,9 +875,6 @@  int i915_restore_state(struct drm_device *dev)
 		intel_init_emon(dev);
 	}
 
-	if (IS_GEN6(dev))
-		gen6_enable_rps(dev_priv);
-
 	/* Cache mode state */
 	I915_WRITE (CACHE_MODE_0, dev_priv->saveCACHE_MODE_0 | 0xffff0000);