From patchwork Thu Apr 14 09:03:42 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 706671 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p3E96wjl008453 for ; Thu, 14 Apr 2011 09:07:18 GMT Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4887A9F50A for ; Thu, 14 Apr 2011 02:06:58 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from fireflyinternet.com (server109-228-6-236.live-servers.net [109.228.6.236]) by gabe.freedesktop.org (Postfix) with ESMTP id 7CE069E976 for ; Thu, 14 Apr 2011 02:03:58 -0700 (PDT) X-Default-Received-SPF: pass (skip=forwardok (res=PASS)) x-ip-name=78.156.66.37; Received: from arrandale.alporthouse.com (unverified [78.156.66.37]) by fireflyinternet.com (Firefly Internet SMTP) with ESMTP id 32027233-1500050 for multiple; Thu, 14 Apr 2011 10:03:53 +0100 From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Thu, 14 Apr 2011 10:03:42 +0100 Message-Id: <1302771827-26112-9-git-send-email-chris@chris-wilson.co.uk> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1302771827-26112-1-git-send-email-chris@chris-wilson.co.uk> References: <1302771827-26112-1-git-send-email-chris@chris-wilson.co.uk> X-Originating-IP: 78.156.66.37 Subject: [Intel-gfx] [PATCH 08/13] drm/i915: Pin after setting to the display plane X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.11 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Thu, 14 Apr 2011 09:07:19 +0000 (UTC) A few operations we do in order to move the object into the display plane it is important for future safety to forbid whilst pinned. As a result, we want to pin afterwards. At the moment, setting to the display plane of an unbound object is simply to bind it, so set_to_display_plane() becomes a no-op. Signed-off-by: Chris Wilson Reviewed-by: Daniel Vetter --- drivers/gpu/drm/i915/i915_gem.c | 7 +++---- drivers/gpu/drm/i915/intel_display.c | 20 ++++++++++---------- drivers/gpu/drm/i915/intel_overlay.c | 8 ++++---- 3 files changed, 17 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index b92510c..3f1181b 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -3105,15 +3105,14 @@ i915_gem_object_set_to_display_plane(struct drm_i915_gem_object *obj, uint32_t old_read_domains; int ret; - /* Not valid to be called on unbound objects. */ - if (obj->gtt_space == NULL) - return -EINVAL; + /* If the object is currently unbound, this is a no-op. */ + if (obj->gtt_space) + return 0; ret = i915_gem_object_flush_gpu_write_domain(obj); if (ret) return ret; - /* Currently, we are always called from an non-interruptible context. */ if (pipelined != obj->ring) { ret = i915_gem_object_wait_rendering(obj); diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 56741c6..811b6e3 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1807,14 +1807,14 @@ intel_pin_and_fence_fb_obj(struct drm_device *dev, } dev_priv->mm.interruptible = false; - ret = i915_gem_object_pin(obj, alignment, true); - if (ret) - goto err_interruptible; - ret = i915_gem_object_set_to_display_plane(obj, pipelined); if (ret) goto err_unpin; + ret = i915_gem_object_pin(obj, alignment, true); + if (ret) + goto err_interruptible; + /* Install a fence for tiled scan-out. Pre-i965 always needs a * fence, whereas 965+ only requires a fence if using * framebuffer compression. For simplicity, we always install @@ -5354,12 +5354,6 @@ static int intel_crtc_cursor_set(struct drm_crtc *crtc, goto fail_locked; } - ret = i915_gem_object_pin(obj, PAGE_SIZE, true); - if (ret) { - DRM_ERROR("failed to pin cursor bo\n"); - goto fail_locked; - } - ret = i915_gem_object_set_to_display_plane(obj, NULL); if (ret) { DRM_ERROR("failed to move cursor bo into the GTT\n"); @@ -5372,6 +5366,12 @@ static int intel_crtc_cursor_set(struct drm_crtc *crtc, goto fail_unpin; } + ret = i915_gem_object_pin(obj, PAGE_SIZE, true); + if (ret) { + DRM_ERROR("failed to pin cursor bo\n"); + goto fail_locked; + } + addr = obj->gtt_offset; } else { int align = IS_I830(dev) ? 16 * 1024 : 256; diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c index e0903c5..b4ae58d 100644 --- a/drivers/gpu/drm/i915/intel_overlay.c +++ b/drivers/gpu/drm/i915/intel_overlay.c @@ -773,10 +773,6 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay, if (ret != 0) return ret; - ret = i915_gem_object_pin(new_bo, PAGE_SIZE, true); - if (ret != 0) - return ret; - ret = i915_gem_object_set_to_display_plane(new_bo, NULL); if (ret != 0) goto out_unpin; @@ -785,6 +781,10 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay, if (ret) goto out_unpin; + ret = i915_gem_object_pin(new_bo, PAGE_SIZE, true); + if (ret != 0) + return ret; + if (!overlay->active) { regs = intel_overlay_map_regs(overlay); if (!regs) {