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[10/16] intel: Drop unused IS_GEN5-7 macros

Message ID 1307475261-32695-11-git-send-email-krh@bitplanet.net
State New, archived
Headers show

Commit Message

Kristian Hogsberg June 7, 2011, 7:34 p.m. UTC
---
 src/mesa/drivers/dri/intel/intel_chipset.h |   10 ----------
 src/mesa/drivers/dri/intel/intel_context.c |    6 +++---
 2 files changed, 3 insertions(+), 13 deletions(-)
diff mbox

Patch

diff --git a/src/mesa/drivers/dri/intel/intel_chipset.h b/src/mesa/drivers/dri/intel/intel_chipset.h
index 3e11f64..979cd0b 100644
--- a/src/mesa/drivers/dri/intel/intel_chipset.h
+++ b/src/mesa/drivers/dri/intel/intel_chipset.h
@@ -91,10 +91,6 @@ 
 #define IS_GM45(devid)          (devid == PCI_CHIP_GM45_GM)
 #define IS_G4X(devid)		(IS_G45(devid) || IS_GM45(devid))
 
-#define IS_ILD(devid)           (devid == PCI_CHIP_ILD_G)
-#define IS_ILM(devid)           (devid == PCI_CHIP_ILM_G)
-#define IS_GEN5(devid)          (IS_ILD(devid) || IS_ILM(devid))
-
 #define IS_SNB_GT1(devid)	(devid == PCI_CHIP_SANDYBRIDGE_GT1 || \
 				 devid == PCI_CHIP_SANDYBRIDGE_M_GT1 || \
 				 devid == PCI_CHIP_SANDYBRIDGE_S)
@@ -104,15 +100,9 @@ 
 				 devid == PCI_CHIP_SANDYBRIDGE_M_GT2 || \
 				 devid == PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS)
 
-#define IS_GEN6(devid)		(IS_SNB_GT1(devid) || IS_SNB_GT2(devid))
-
 #define IS_IVB_GT1(devid)       (devid == PCI_CHIP_IVYBRIDGE_GT1 || \
 				 devid == PCI_CHIP_IVYBRIDGE_M_GT1 || \
 				 devid == PCI_CHIP_IVYBRIDGE_S_GT1)
 
 #define IS_IVB_GT2(devid)       (devid == PCI_CHIP_IVYBRIDGE_GT2 || \
 				 devid == PCI_CHIP_IVYBRIDGE_M_GT2)
-
-#define IS_IVYBRIDGE(devid)     (IS_IVB_GT1(devid) || IS_IVB_GT2(devid))
-
-#define IS_GEN7(devid)	        IS_IVYBRIDGE(devid)
diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c
index acf7182..f696c3f 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -711,18 +711,18 @@  intelInitContext(struct intel_context *intel,
 
    intel->has_xrgb_textures = GL_TRUE;
    intel->gen = intelScreen->chipset.gen;
-   if (IS_GEN7(intel->intelScreen->deviceID)) {
+   if (intel->intelScreen->chipset.gen == 7) {
       intel->needs_ff_sync = GL_TRUE;
       intel->has_luminance_srgb = GL_TRUE;
       /* FINISHME: Enable intel->has_separate_stencil on Gen7. */
       /* FINISHME: Enable intel->must_use_separate_stencil on Gen7. */
       /* FINISHME: Enable intel->has_hiz on Gen7. */
-   } else if (IS_GEN6(intel->intelScreen->deviceID)) {
+   } else if (intel->intelScreen->chipset.gen == 6) {
       intel->needs_ff_sync = GL_TRUE;
       intel->has_luminance_srgb = GL_TRUE;
       /* FINISHME: Enable intel->has_separate_stencil on Gen6. */
       /* FINISHME: Enable intel->has_hiz on Gen6. */
-   } else if (IS_GEN5(intel->intelScreen->deviceID)) {
+   } else if (intel->intelScreen->chipset.gen == 5) {
       intel->needs_ff_sync = GL_TRUE;
       intel->has_luminance_srgb = GL_TRUE;
    } else if (intel->intelScreen->chipset.gen == 4) {