diff mbox

[2/2] drm/i915: add Ivy Bridge page flip support

Message ID 1308075188-2821-2-git-send-email-jbarnes@virtuousgeek.org
State New, archived
Headers show

Commit Message

Jesse Barnes June 14, 2011, 6:13 p.m. UTC
Use the blit ring for submitting flips since the render ring doesn't
generate flip complete interrupts.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
 drivers/gpu/drm/i915/intel_display.c |   25 +++++++++++++++++++++++++
 1 files changed, 25 insertions(+), 0 deletions(-)

Comments

Chris Wilson June 14, 2011, 6:22 p.m. UTC | #1
On Tue, 14 Jun 2011 11:13:08 -0700, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
> Use the blit ring for submitting flips since the render ring doesn't
> generate flip complete interrupts.
> 
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> ---
>  drivers/gpu/drm/i915/intel_display.c |   25 +++++++++++++++++++++++++
>  1 files changed, 25 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 06748f3a..3d095de 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -6379,6 +6379,28 @@ out:
>  	return ret;
>  }
>  
> +static int intel_gen7_queue_flip(struct drm_device *dev,
> +				 struct drm_crtc *crtc,
> +				 struct drm_framebuffer *fb,
> +				 struct drm_i915_gem_object *obj)
> +{
> +	struct drm_i915_private *dev_priv = dev->dev_private;
> +	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
struct intel_ring_buffer *ring = &dev_priv->ring[BCS];
> +	int ret;
> +
> +	ret = intel_ring_begin(&dev_priv->ring[BCS], 4);
> +	if (ret)
> +		goto out;
> +
> +	intel_ring_emit(&dev_priv->ring[BCS], (MI_DISPLAY_FLIP_I915 | (intel_crtc->plane << 19)) | (1 << 17));
What's the magic number? 80 column limit?
-Chris
Jesse Barnes June 14, 2011, 7:35 p.m. UTC | #2
On Tue, 14 Jun 2011 19:22:33 +0100
Chris Wilson <chris@chris-wilson.co.uk> wrote:

> On Tue, 14 Jun 2011 11:13:08 -0700, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
> > Use the blit ring for submitting flips since the render ring doesn't
> > generate flip complete interrupts.
> > 
> > Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> > ---
> >  drivers/gpu/drm/i915/intel_display.c |   25 +++++++++++++++++++++++++
> >  1 files changed, 25 insertions(+), 0 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index 06748f3a..3d095de 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -6379,6 +6379,28 @@ out:
> >  	return ret;
> >  }
> >  
> > +static int intel_gen7_queue_flip(struct drm_device *dev,
> > +				 struct drm_crtc *crtc,
> > +				 struct drm_framebuffer *fb,
> > +				 struct drm_i915_gem_object *obj)
> > +{
> > +	struct drm_i915_private *dev_priv = dev->dev_private;
> > +	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> struct intel_ring_buffer *ring = &dev_priv->ring[BCS];
> > +	int ret;
> > +
> > +	ret = intel_ring_begin(&dev_priv->ring[BCS], 4);
> > +	if (ret)
> > +		goto out;
> > +
> > +	intel_ring_emit(&dev_priv->ring[BCS], (MI_DISPLAY_FLIP_I915 | (intel_crtc->plane << 19)) | (1 << 17));
> What's the magic number? 80 column limit?
> -Chris

All good points.  See the updated patches.

Thanks,
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 06748f3a..3d095de 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6379,6 +6379,28 @@  out:
 	return ret;
 }
 
+static int intel_gen7_queue_flip(struct drm_device *dev,
+				 struct drm_crtc *crtc,
+				 struct drm_framebuffer *fb,
+				 struct drm_i915_gem_object *obj)
+{
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+	int ret;
+
+	ret = intel_ring_begin(&dev_priv->ring[BCS], 4);
+	if (ret)
+		goto out;
+
+	intel_ring_emit(&dev_priv->ring[BCS], (MI_DISPLAY_FLIP_I915 | (intel_crtc->plane << 19)) | (1 << 17));
+	intel_ring_emit(&dev_priv->ring[BCS], (fb->pitch | obj->tiling_mode));
+	intel_ring_emit(&dev_priv->ring[BCS], (obj->gtt_offset));
+	intel_ring_emit(&dev_priv->ring[BCS], (MI_NOOP));
+	intel_ring_advance(&dev_priv->ring[BCS]);
+out:
+	return ret;
+}
+
 static int intel_crtc_page_flip(struct drm_crtc *crtc,
 				struct drm_framebuffer *fb,
 				struct drm_pending_vblank_event *event)
@@ -7744,6 +7766,9 @@  static void intel_init_display(struct drm_device *dev)
 	case 6:
 		dev_priv->display.queue_flip = intel_gen6_queue_flip;
 		break;
+	case 7:
+		dev_priv->display.queue_flip = intel_gen7_queue_flip;
+		break;
 	}
 }