From patchwork Wed Jul 13 20:51:46 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Widawsky X-Patchwork-Id: 973312 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by demeter2.kernel.org (8.14.4/8.14.4) with ESMTP id p6DKvCFf026863 for ; Wed, 13 Jul 2011 20:57:32 GMT Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C700CA0B3C for ; Wed, 13 Jul 2011 13:57:12 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from cloud01.chad-versace.us (184-106-247-128.static.cloud-ips.com [184.106.247.128]) by gabe.freedesktop.org (Postfix) with ESMTP id BF539A0AD2; Wed, 13 Jul 2011 13:51:57 -0700 (PDT) Received: from localhost (localhost [127.0.0.1]) by cloud01.chad-versace.us (Postfix) with ESMTP id 7ED061D42F0; Wed, 13 Jul 2011 20:54:23 +0000 (UTC) X-Virus-Scanned: amavisd-new at static.cloud-ips.com X-Spam-Flag: NO X-Spam-Score: -1 X-Spam-Level: X-Spam-Status: No, score=-1 tagged_above=-100 required=5 tests=[ALL_TRUSTED=-1] autolearn=ham Received: from cloud01.chad-versace.us ([127.0.0.1]) by localhost (cloud01.static.cloud-ips.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id OpGC+9-UVAxk; Wed, 13 Jul 2011 20:54:16 +0000 (UTC) Received: from localhost.localdomain (jfdmzpr03-ext.jf.intel.com [134.134.139.72]) by cloud01.chad-versace.us (Postfix) with ESMTPSA id CA10A1D42F4; Wed, 13 Jul 2011 20:53:58 +0000 (UTC) From: Ben Widawsky To: intel-gfx@lists.freedesktop.org Date: Wed, 13 Jul 2011 13:51:46 -0700 Message-Id: <1310590312-21669-5-git-send-email-ben@bwidawsk.net> X-Mailer: git-send-email 1.7.6 In-Reply-To: <1310590312-21669-1-git-send-email-ben@bwidawsk.net> References: <1310590312-21669-1-git-send-email-ben@bwidawsk.net> Cc: mesa-dev@lists.freedesktop.org, Ben Widawsky Subject: [Intel-gfx] [PATCH 04/10] i965: setup system routine X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.11 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Wed, 13 Jul 2011 20:57:33 +0000 (UTC) Upload the system routine as part of the invariant state if debugging. Remove SIP setting if not debugging to make it more friendly for others that may be debugging shaders or media kernels. Signed-off-by: Ben Widawsky --- src/mesa/drivers/dri/i965/brw_misc_state.c | 13 +++++++++---- 1 files changed, 9 insertions(+), 4 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c index bc8ef78..139c190 100644 --- a/src/mesa/drivers/dri/i965/brw_misc_state.c +++ b/src/mesa/drivers/dri/i965/brw_misc_state.c @@ -652,10 +652,15 @@ static void upload_invarient_state( struct brw_context *brw ) } } - BEGIN_BATCH(2); - OUT_BATCH(CMD_STATE_SIP << 16 | (2 - 2)); - OUT_BATCH(0); - ADVANCE_BATCH(); + /* The system routine must be set after a change to Instruction base */ + if (brw->wm.debugging) { + assert(brw->wm.sip_offset != 0); + /* assert instruction base == 0 */ + BEGIN_BATCH(2); + OUT_BATCH(CMD_STATE_SIP << 16 | (2 - 2)); + OUT_BATCH(brw->wm.sip_offset); + ADVANCE_BATCH(); + } BEGIN_BATCH(1); OUT_BATCH(brw->CMD_VF_STATISTICS << 16 |