From patchwork Wed Jul 4 20:18:43 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 1157301 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id DA3343FC36 for ; Wed, 4 Jul 2012 20:22:32 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C34419E8EB for ; Wed, 4 Jul 2012 13:22:32 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wi0-f171.google.com (mail-wi0-f171.google.com [209.85.212.171]) by gabe.freedesktop.org (Postfix) with ESMTP id 98DCA9E9D5 for ; Wed, 4 Jul 2012 13:18:58 -0700 (PDT) Received: by mail-wi0-f171.google.com with SMTP id hq4so4146940wib.12 for ; Wed, 04 Jul 2012 13:18:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=ZwRM/sg4Nje4sWUMqpBriaGKuLsqY6trerqL9HFcup4=; b=OizWsSa+LHqrmCErYkAz+XnW4BRnQP3SgigYlwupHNWQ21BW3+mv2tWfXG2qro7qiP gNqlJhrk3SeeQV9cwQbVn/Ie5DOA2+Nkof+fuhNLyvo9vUR6xfKVm7lJP0n3zwtmU33L KtNUj4Bmp/EbutE/+4vd7R3e3YWJg2h66VMc8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=ZwRM/sg4Nje4sWUMqpBriaGKuLsqY6trerqL9HFcup4=; b=KpcbuEJg2xFLNph7OYrpHheeFO3C/+2dikpYdXTUgkyBNe8GMqD/wYR3R5eG2WFboJ 19rUMhTDD3L1M2mOHtCJghZ7S4MajOHWtyiIeSD59P4RT1i5q0E+5XGNZNDLFxiP6F0o GOokp1qUJzvdf9qGtcY6H5M3BbqPiJum/51QUWyFEbHJU1YbKQd2n/+bkKPj+Lg+GD7S iR72Xgsrv1Kogrppvpau7eR1U4SBTz4jUVJQPc8fFmv+yarcNCM/QVGUMKi7kkGETwfI EFauOXyWzhSeGJsiIo0D3lkRFjT8TxlTzh94XEVJggtM8lyIHGumS2+UYRKC5FBmUbsv F2Pw== Received: by 10.180.97.33 with SMTP id dx1mr10278442wib.18.1341433138186; Wed, 04 Jul 2012 13:18:58 -0700 (PDT) Received: from aaron.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id bg10sm69602224wib.9.2012.07.04.13.18.56 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 04 Jul 2012 13:18:57 -0700 (PDT) From: Daniel Vetter To: Intel Graphics Development Date: Wed, 4 Jul 2012 22:18:43 +0200 Message-Id: <1341433123-23055-6-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.10 In-Reply-To: <1341433123-23055-1-git-send-email-daniel.vetter@ffwll.ch> References: <1341433123-23055-1-git-send-email-daniel.vetter@ffwll.ch> X-Gm-Message-State: ALoCoQmXaNhmNf/zWRZtBn/CXY+cwVOlEebdzo+cVTOJVHq4yalvtXAYcxVRiCxbMwdQ3642fMKz Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 5/5] drm/i915: don't return a spurious -EIO from intel_ring_begin X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org The issue with this check is that it results in userspace receiving an -EIO while the gpu reset hasn't completed, resulting in fallback to sw rendering or worse. Now there's also a stern comment in intel_ring_wait_seqno saying that intel_ring_begin should not return -EAGAIN, ever, because some callers can't handle that. But after an audit of the callsites I don't see any issues. I guess the last problematic spot disappeared with the removal of the pipelined fencing code. So do the right thing and call check_wedge, which should properly decide whether an -EAGIN or -EIO is appropriate if wedged is set. Note that the early check for a wedged gpu before touching the ring is rather important (and it took me quite some time of acting like the densest doofus to figure that out): If we don't do that and the gpu died for good, not having been resurrect by the reset code, userspace can merrily fill up the entire ring until it notices that something is amiss. Allowing userspace to emit more render, despite that we know that it will fail can't lead to anything good (and by experience can lead to all sorts of havoc, including angering the OOM gods and hard-hanging the hw for good). Signed-Off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_ringbuffer.c | 18 ++++-------------- 1 file changed, 4 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index cd35ad4..d42d821 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -1117,20 +1117,9 @@ static int intel_wrap_ring_buffer(struct intel_ring_buffer *ring) static int intel_ring_wait_seqno(struct intel_ring_buffer *ring, u32 seqno) { - struct drm_i915_private *dev_priv = ring->dev->dev_private; - bool was_interruptible; int ret; - /* XXX As we have not yet audited all the paths to check that - * they are ready for ERESTARTSYS from intel_ring_begin, do not - * allow us to be interruptible by a signal. - */ - was_interruptible = dev_priv->mm.interruptible; - dev_priv->mm.interruptible = false; - ret = i915_wait_seqno(ring, seqno); - - dev_priv->mm.interruptible = was_interruptible; if (!ret) i915_gem_retire_requests_ring(ring); @@ -1240,12 +1229,13 @@ int intel_wait_ring_buffer(struct intel_ring_buffer *ring, int n) int intel_ring_begin(struct intel_ring_buffer *ring, int num_dwords) { - struct drm_i915_private *dev_priv = ring->dev->dev_private; + drm_i915_private_t *dev_priv = ring->dev->dev_private; int n = 4*num_dwords; int ret; - if (unlikely(atomic_read(&dev_priv->mm.wedged))) - return -EIO; + ret = i915_gem_check_wedge(dev_priv, dev_priv->mm.interruptible); + if (ret) + return ret; if (unlikely(ring->tail + n > ring->effective_size)) { ret = intel_wrap_ring_buffer(ring);