[1/1] drm/i915: initialize power wells in modeset_init_hw

Commit Message

Eugeni Dodonov July 6, 2012, 6:42 p.m. UTC

This initializes power wells within the modeset_init_hw routine.
Testing has shown that this works for both driver load time and for
suspend-resume code paths.

Signed-off-by: Eugeni Dodonov <[e-mail]>
---
 drivers/gpu/drm/i915/intel_display.c | 5 +++++
 drivers/gpu/drm/i915/intel_drv.h     | 1 +
 drivers/gpu/drm/i915/intel_pm.c      | 5 -----
 3 files changed, 6 insertions(+), 5 deletions(-)

Comments

Daniel Vetter July 8, 2012, 5:42 p.m. UTC | #1

On Fri, Jul 06, 2012 at 03:42:36PM -0300, Eugeni Dodonov wrote:
> This initializes power wells within the modeset_init_hw routine.
> Testing has shown that this works for both driver load time and for
> suspend-resume code paths.
> 
> Signed-off-by: Eugeni Dodonov <[e-mail]>
Queued for -next, thanks for the patch.
-Daniel

Patch

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 3ca91e2..9339797 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -7277,6 +7277,11 @@  static void ivb_pch_pwm_override(struct drm_device *dev)
 
 void intel_modeset_init_hw(struct drm_device *dev)
 {
+	/* We attempt to init the necessary power wells early in the initialization
+	 * time, so the subsystems that expect power to be enabled can work.
+	 */
+	intel_init_power_wells(dev);
+
 	intel_prepare_ddi(dev);
 
 	intel_init_clock_gating(dev);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 6dd25e9..c2fecec 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -531,6 +531,7 @@  extern void intel_update_fbc(struct drm_device *dev);
 extern void intel_gpu_ips_init(struct drm_i915_private *dev_priv);
 extern void intel_gpu_ips_teardown(void);
 
+extern void intel_init_power_wells(struct drm_device *dev);
 extern void intel_enable_gt_powersave(struct drm_device *dev);
 extern void intel_disable_gt_powersave(struct drm_device *dev);
 extern void gen6_gt_check_fifodbg(struct drm_i915_private *dev_priv);
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 0350bab..104c3ab 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3973,11 +3973,6 @@  void intel_init_pm(struct drm_device *dev)
 		else
 			dev_priv->display.get_fifo_size = i830_get_fifo_size;
 	}
-
-	/* We attempt to init the necessary power wells early in the initialization
-	 * time, so the subsystems that expect power to be enabled can work.
-	 */
-	intel_init_power_wells(dev);
 }
 
 static void __gen6_gt_wait_for_thread_c0(struct drm_i915_private *dev_priv)