From patchwork Tue Jul 10 22:31:06 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 1179161 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id 34009DFF0F for ; Tue, 10 Jul 2012 22:31:43 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B3582A0D8B for ; Tue, 10 Jul 2012 15:31:42 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-we0-f177.google.com (mail-we0-f177.google.com [74.125.82.177]) by gabe.freedesktop.org (Postfix) with ESMTP id 5FECA9EBA3 for ; Tue, 10 Jul 2012 15:31:14 -0700 (PDT) Received: by weyr3 with SMTP id r3so382470wey.36 for ; Tue, 10 Jul 2012 15:31:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer; bh=yRW2usz4S+q+1hI4w5312A7xnVrL2N7JzWj6GOMqr7Y=; b=lN9Rsp9L8XRoIMnJ+pHj5UWW66q9Wtv09TGG27U9/MfV4l3xzAWZhlC5ZXEyH79z2+ 2BSj+/hjOjjQC7oQKvyPWUBZ2CdTaoibVhdNNkPeTy18IVLxlsT9njCosx1XXw5GeSgw g6RLqTbnlPtT5ftmq5537NMyqlzVN/WnN/rz4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:x-gm-message-state; bh=yRW2usz4S+q+1hI4w5312A7xnVrL2N7JzWj6GOMqr7Y=; b=HZmZXhMqS8AdmUGjf6Qp5t5ea4EecGDKJxSc0JZqEPNb2eotS/1DB2WetM37RJoBtI bkZc+VhQWsLXDwyyk1DH6K/VVeQu0+TuLgnvEEVVtY7N4d2ml5QfrVLfcO4rJOWYa4o4 Ty3+AiFSZgbcs20kDlxpysmXoikhEDVkKZvMmkAlWCfXqxd3sJvNEcFc6hTqd5qZdRZ3 +HN/qF89woNMWGypI5Bf/KKghTO1BFK6CnW04jKHg4xB5u1Vq+OOhYxobpxrhMFRhQeY Ucl0ZmLAnX9rMoPtWwxCEzGXvdDQqDo/9Uph7+1cwyJz60nGDY6OgZN/zN4/03UL17cZ 1I6w== Received: by 10.180.78.99 with SMTP id a3mr41709586wix.15.1341959473379; Tue, 10 Jul 2012 15:31:13 -0700 (PDT) Received: from bremse.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id bc2sm72372wib.0.2012.07.10.15.31.11 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 10 Jul 2012 15:31:12 -0700 (PDT) From: Daniel Vetter To: Intel Graphics Development Date: Wed, 11 Jul 2012 00:31:06 +0200 Message-Id: <1341959466-1564-1-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.10.2 X-Gm-Message-State: ALoCoQnCB4Zy2VT2T15SKXeLZyTJCJIeavm3eL26kJ2708/Z4yLBnMhk+3PYgu1qFW0gums0moMY Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH] drm/i915: fix up PCH backlight #define mixup X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org I so totally suck. This can cause a black screen if (for whatever reason) the bios hasn't set this bit itself. This regression has been introduced in commit 7cf4160148136deb31ee5f2802857dd935a38529 Author: Daniel Vetter Date: Tue Jun 5 10:07:09 2012 +0200 drm/i915: clear up backlight #define confusion on gen4+ Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=51463 Signed-Off-by: Daniel Vetter Tested-by: Kenneth Graunke --- drivers/gpu/drm/i915/i915_reg.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index bd1cda2..45c6703 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1921,7 +1921,7 @@ /* PCH CTL1 is totally different, all but the below bits are reserved. CTL2 is * like the normal CTL from gen4 and earlier. Hooray for confusing naming. */ #define BLC_PWM_PCH_CTL1 0xc8250 -#define BLM_PCH_PWM_ENABLE (1 << 30) +#define BLM_PCH_PWM_ENABLE (1 << 31) #define BLM_PCH_OVERRIDE_ENABLE (1 << 30) #define BLM_PCH_POLARITY (1 << 29) #define BLC_PWM_PCH_CTL2 0xc8254