From patchwork Wed Jul 11 14:28:27 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 1183951 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id 6F2983FC8E for ; Wed, 11 Jul 2012 16:10:32 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3C947A0DB1 for ; Wed, 11 Jul 2012 09:10:32 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wi0-f171.google.com (mail-wi0-f171.google.com [209.85.212.171]) by gabe.freedesktop.org (Postfix) with ESMTP id D21D29ED8F for ; Wed, 11 Jul 2012 08:36:08 -0700 (PDT) Received: by mail-wi0-f171.google.com with SMTP id hq4so3953871wib.12 for ; Wed, 11 Jul 2012 08:36:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=oPKJEHMrsnuxCY9f56mSMpd/aKAw400vx8XfAv+E7qo=; b=K8Twiq/a7R6gk74Qvw9mEEIQfYZWc0YUlilCNim1DEOVdOdW1PfIQbsDpGrk8oPCUE NGdMtGCTbAUiw4nJyYzcHF98PDHy03B0H/gNpO4PoX8MS1wg0WxDX7d97BPfWbPBCSzj wiWvgjOdnKFBmG4uy0YswqMdgtWMInMJIXzVk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=oPKJEHMrsnuxCY9f56mSMpd/aKAw400vx8XfAv+E7qo=; b=Wy1AqRVla7DhJUqwgcI0B3gbEae9eI/Z83VPxZkz/sxyIS2Rco8errVptNITY1EbdW lvsy6gdCb1LtH5yYpw/B/D0ciaRpljN3VdXDd1wZADPoWliQaOC6HY75pXKiIJpaSX5+ cnujiLxPBPn3ydaJVO91OlhGTCzVh1xGOf7yfTbPoB7ZqvnVyzZeyNzHqbKwin6PrBmX E/4BBCbSRCmBJ8C3m38ksqpq4jtkuTIycOi+mGlPb6YTmPZkDujpAtOS6Ud6zyYImR0V pddXZlV9VgCsFIccD8MJEUuoW70vbwwS/MA90mmQhHP+Bajdp9I62wCWcnuxiIZnTi/E Oe5Q== Received: by 10.216.144.69 with SMTP id m47mr22423065wej.86.1342020968334; Wed, 11 Jul 2012 08:36:08 -0700 (PDT) Received: from wespe.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id bc2sm5777080wib.0.2012.07.11.08.36.07 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 11 Jul 2012 08:36:07 -0700 (PDT) From: Daniel Vetter To: Intel Graphics Development Date: Wed, 11 Jul 2012 16:28:27 +0200 Message-Id: <1342016944-23395-45-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.7.6 In-Reply-To: <1342016944-23395-1-git-send-email-daniel.vetter@ffwll.ch> References: <1342016944-23395-1-git-send-email-daniel.vetter@ffwll.ch> X-Gm-Message-State: ALoCoQnsbmb9gJ7Ds9ZsBuVHhdPx4fcKMLcmy/4VssDvPhrzRwFC7Agivf271lmZdtok9k0xxuIA Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 44/81] drm/i915: rip out intel_crtc->dpms_mode X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Afaict this has been used for two things: - To prevent the crtc enable code from being run twice. We have now intel_crtc->active to track this in a more precise way. - To ensure the code copes correctly with the unknown hw state after boot and resume. Thanks to the hw state readout and sanitize code we have now a better way to handle this. The only thing it still does is complicate our modeset state space. Having outlived its usefullness, let it just die. Signed-Off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_display.c | 17 ----------------- drivers/gpu/drm/i915/intel_drv.h | 1 - 2 files changed, 0 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 4160b09..649d327 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3458,18 +3458,10 @@ void intel_crtc_update_dpms(struct drm_crtc *crtc) struct intel_encoder *intel_encoder; int pipe = intel_crtc->pipe; bool enabled, enable = false; - int mode; for_each_encoder_on_crtc(dev, crtc, intel_encoder) enable |= intel_encoder->connectors_active; - mode = enable ? DRM_MODE_DPMS_ON : DRM_MODE_DPMS_OFF; - - if (intel_crtc->dpms_mode == mode) - return; - - intel_crtc->dpms_mode = mode; - if (enable) dev_priv->display.crtc_enable(crtc); else @@ -5036,11 +5028,6 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc, x, y, old_fb); drm_vblank_post_modeset(dev, pipe); - if (ret) - intel_crtc->dpms_mode = DRM_MODE_DPMS_OFF; - else - intel_crtc->dpms_mode = DRM_MODE_DPMS_ON; - return ret; } @@ -7649,10 +7636,6 @@ static void intel_sanitize_crtc(struct intel_crtc *crtc) struct drm_i915_private *dev_priv = dev->dev_private; u32 reg, val; - /* Clear the dpms state for compatibility with code still using that - * deprecated state variable. */ - crtc->dpms_mode = -1; - /* Clear any frame start delays used for debugging left by the BIOS */ reg = PIPECONF(crtc->pipe); I915_WRITE(reg, I915_READ(reg) & ~PIPECONF_FRAME_START_DELAY_MASK); diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 38b120a..8effd1b 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -162,7 +162,6 @@ struct intel_crtc { enum pipe pipe; enum plane plane; u8 lut_r[256], lut_g[256], lut_b[256]; - int dpms_mode; /* * Whether the crtc and the connected output pipeline is active. Implies * that crtc->enabled is set, i.e. the current mode configuration has