From patchwork Wed Jul 11 14:28:55 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 1184271 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id A860CDF25A for ; Wed, 11 Jul 2012 16:30:20 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8D294A0EB1 for ; Wed, 11 Jul 2012 09:30:20 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wg0-f43.google.com (mail-wg0-f43.google.com [74.125.82.43]) by gabe.freedesktop.org (Postfix) with ESMTP id 80CE39E94F for ; Wed, 11 Jul 2012 08:36:49 -0700 (PDT) Received: by mail-wg0-f43.google.com with SMTP id dr1so946968wgb.12 for ; Wed, 11 Jul 2012 08:36:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=LUjp//xdeDCheEqPXdLx+bxLQ8jVTTkeZG/NDrABO4w=; b=XXDP2/AgbJSwJM0zlPY1D4PTXqjAO9JCpJNnM5kRKLy/qocm8pNVsNRdH1KIPCtRUz LGaQQx9N3zgA0oQcGLh5wpStK6g4saHR5VZxpZQB7eLUkqNz/YwYSCejrZN2k9l4GKqu KIEg0DWEbc2mbLNY2Yg9eWbrG8kAx7xLXqT/U= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=LUjp//xdeDCheEqPXdLx+bxLQ8jVTTkeZG/NDrABO4w=; b=kRTeKd+hqJtizHHvyOYhQ56JOtLH3SdbzQ62hrQJ58+ccrlWUEzM8D6w1O3pmkbMgw 0SgLF7wBSBjsBl5aEHuRptclhiW2qEN5Su/hf0WU8KAVyMM+hZkIQ0rDefIE9bhbE2rm aRdq0Q0PDoiKrY+2Gl/bTjRCnhEYBdJyf1uD6cOQJkRLcSXbdBztyY9V/w7zqGXRNWmV AtZUCvKDOxDMJvYaOd2RQ3crcQqwRLPUvuV3tKHEfgqoU1gixdwH64L3cNsEWnjSP6VF ptwkHWvytGkJUVtDju2LzeMGxO8Hoyq6qYFT3BB+VtoVHINbF7u3oGILo9ngtpfiHvL3 zSwQ== Received: by 10.216.136.203 with SMTP id w53mr21615495wei.63.1342021008933; Wed, 11 Jul 2012 08:36:48 -0700 (PDT) Received: from wespe.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id bc2sm5777080wib.0.2012.07.11.08.36.47 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 11 Jul 2012 08:36:48 -0700 (PDT) From: Daniel Vetter To: Intel Graphics Development Date: Wed, 11 Jul 2012 16:28:55 +0200 Message-Id: <1342016944-23395-73-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.7.6 In-Reply-To: <1342016944-23395-1-git-send-email-daniel.vetter@ffwll.ch> References: <1342016944-23395-1-git-send-email-daniel.vetter@ffwll.ch> X-Gm-Message-State: ALoCoQnMaVJnKZjPNgGImY7NE8fn94sHanBbHG8oLapGvHuuZ+mpk9EOtkfSChaSgMBp0UsFG+Ft Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 72/81] drm/i915: extract ironlake_fdi_pll_disable X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Simply to make the ilk+ crtc disable path clearer and more symmetric with the enable function. Also switch to intel_crtc for the enable function. Signed-Off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_display.c | 57 +++++++++++++++++++-------------- 1 files changed, 33 insertions(+), 24 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 1bade92..36bdac1 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -2710,11 +2710,10 @@ static void ivb_manual_fdi_link_train(struct drm_crtc *crtc) DRM_DEBUG_KMS("FDI train done.\n"); } -static void ironlake_fdi_pll_enable(struct drm_crtc *crtc) +static void ironlake_fdi_pll_enable(struct intel_crtc *intel_crtc) { - struct drm_device *dev = crtc->dev; + struct drm_device *dev = intel_crtc->base.dev; struct drm_i915_private *dev_priv = dev->dev_private; - struct intel_crtc *intel_crtc = to_intel_crtc(crtc); int pipe = intel_crtc->pipe; u32 reg, temp; @@ -2755,6 +2754,35 @@ static void ironlake_fdi_pll_enable(struct drm_crtc *crtc) } } +static void ironlake_fdi_pll_disable(struct intel_crtc *intel_crtc) +{ + struct drm_device *dev = intel_crtc->base.dev; + struct drm_i915_private *dev_priv = dev->dev_private; + int pipe = intel_crtc->pipe; + u32 reg, temp; + + /* Switch from PCDclk to Rawclk */ + reg = FDI_RX_CTL(pipe); + temp = I915_READ(reg); + I915_WRITE(reg, temp & ~FDI_PCDCLK); + + /* Disable CPU FDI TX PLL */ + reg = FDI_TX_CTL(pipe); + temp = I915_READ(reg); + I915_WRITE(reg, temp & ~FDI_TX_PLL_ENABLE); + + POSTING_READ(reg); + udelay(100); + + reg = FDI_RX_CTL(pipe); + temp = I915_READ(reg); + I915_WRITE(reg, temp & ~FDI_RX_PLL_ENABLE); + + /* Wait for the clocks to turn off. */ + POSTING_READ(reg); + udelay(100); +} + static void cpt_phase_pointer_disable(struct drm_device *dev, int pipe) { struct drm_i915_private *dev_priv = dev->dev_private; @@ -3205,7 +3233,7 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc) is_pch_port = intel_crtc_driving_pch(crtc); if (is_pch_port) - ironlake_fdi_pll_enable(crtc); + ironlake_fdi_pll_enable(intel_crtc); else ironlake_fdi_disable(crtc); @@ -3319,26 +3347,7 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc) /* disable PCH DPLL */ intel_disable_pch_pll(intel_crtc); - /* Switch from PCDclk to Rawclk */ - reg = FDI_RX_CTL(pipe); - temp = I915_READ(reg); - I915_WRITE(reg, temp & ~FDI_PCDCLK); - - /* Disable CPU FDI TX PLL */ - reg = FDI_TX_CTL(pipe); - temp = I915_READ(reg); - I915_WRITE(reg, temp & ~FDI_TX_PLL_ENABLE); - - POSTING_READ(reg); - udelay(100); - - reg = FDI_RX_CTL(pipe); - temp = I915_READ(reg); - I915_WRITE(reg, temp & ~FDI_RX_PLL_ENABLE); - - /* Wait for the clocks to turn off. */ - POSTING_READ(reg); - udelay(100); + ironlake_fdi_pll_disable(intel_crtc); intel_crtc->active = false; intel_update_watermarks(dev);