From patchwork Thu Jul 19 20:00:22 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Olivier Galibert X-Patchwork-Id: 1218351 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id EB3BBDF25A for ; Thu, 19 Jul 2012 20:14:38 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CF7969F0DD for ; Thu, 19 Jul 2012 13:14:38 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from sasl.smtp.pobox.com (a-pb-sasl-sd.pobox.com [74.115.168.62]) by gabe.freedesktop.org (Postfix) with ESMTP id 5E09CA0FC3; Thu, 19 Jul 2012 13:00:19 -0700 (PDT) Received: from sasl.smtp.pobox.com (unknown [127.0.0.1]) by b-pb-sasl-sd.pobox.com (Postfix) with ESMTP id B32C1B8EC; Thu, 19 Jul 2012 16:00:18 -0400 (EDT) DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=pobox.com; h=from:to:cc :subject:date:message-id:in-reply-to:references; s=sasl; bh=SbCp 4rtIwQpLLTsxRzAsUlXFxo8=; b=c/i0BtrBWTaR1yxS22HUvBNh2Xm/1Djh6XfC y0P31UzJRPhCQNtfS6q1XuEyzJeCza9FtWmpSmkB5nJ5xRPf0L6K1oYoLXss8r/P j5MlnFZ42/5X+e7sjs3kes2Dg/Jjpyjzp13/bpsmEkKwBulw9FneGixxgsTYcUH3 EI9z9bk= DomainKey-Signature: a=rsa-sha1; c=nofws; d=pobox.com; h=from:to:cc :subject:date:message-id:in-reply-to:references; q=dns; s=sasl; b= ZG1SHmlWgZdEfH3DBJHRA3MdROCpPalVz6FcHD3RMLH/RbJ0sqW4VMp9/o76Ga3Z 6aEs4Sdkk8aVO+qga/8SdmHgjj7Skeg4RYZWUP7ZLbCYpGskQDiQdaXlSR7spL1o qQfnnylQ10CVaYCJiMABMdJXr0lqtk1n+3inZati+9w= Received: from b-pb-sasl-sd. (unknown [127.0.0.1]) by b-pb-sasl-sd.pobox.com (Postfix) with ESMTP id 9DD71B8EB; Thu, 19 Jul 2012 16:00:18 -0400 (EDT) Received: from localhost.localdomain (unknown [82.234.121.82]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by b-pb-sasl-sd.pobox.com (Postfix) with ESMTPSA id 03596B8E9; Thu, 19 Jul 2012 16:00:15 -0400 (EDT) From: Olivier Galibert To: intel-gfx@lists.freedesktop.org, mesa-dev@lists.freedesktop.org Date: Thu, 19 Jul 2012 22:00:22 +0200 Message-Id: <1342728024-15055-8-git-send-email-galibert@pobox.com> X-Mailer: git-send-email 1.7.10.280.gaa39 In-Reply-To: <1342728024-15055-1-git-send-email-galibert@pobox.com> References: <1342728024-15055-1-git-send-email-galibert@pobox.com> X-Pobox-Relay-ID: 5CB4CE98-D1DC-11E1-8CD5-126B87E41631-92059326!b-pb-sasl-sd.pobox.com Cc: Olivier Galibert Subject: [Intel-gfx] [PATCH 7/9] intel gen4-5: Correctly handle flat vs. non-flat in the clipper. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org At that point, all interpolation piglit tests involving fixed clipping work as long as there's no noperspective. Signed-off-by: Olivier Galibert Reviewed-by: Paul Berry --- src/mesa/drivers/dri/i965/brw_clip.c | 13 ++++-- src/mesa/drivers/dri/i965/brw_clip.h | 6 +-- src/mesa/drivers/dri/i965/brw_clip_line.c | 6 +-- src/mesa/drivers/dri/i965/brw_clip_tri.c | 20 ++++----- src/mesa/drivers/dri/i965/brw_clip_unfilled.c | 2 +- src/mesa/drivers/dri/i965/brw_clip_util.c | 56 +++++++------------------ src/mesa/drivers/dri/i965/brw_sf_emit.c | 8 ++++ 7 files changed, 50 insertions(+), 61 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_clip.c b/src/mesa/drivers/dri/i965/brw_clip.c index b4a2e0a..8512172 100644 --- a/src/mesa/drivers/dri/i965/brw_clip.c +++ b/src/mesa/drivers/dri/i965/brw_clip.c @@ -218,7 +218,7 @@ brw_upload_clip_prog(struct brw_context *brw) struct intel_context *intel = &brw->intel; struct gl_context *ctx = &intel->ctx; struct brw_clip_prog_key key; - + int i; memset(&key, 0, sizeof(key)); /* Populate the key: @@ -231,11 +231,16 @@ brw_upload_clip_prog(struct brw_context *brw) key.primitive = brw->intel.reduced_primitive; /* CACHE_NEW_VS_PROG (also part of VUE map) */ key.attrs = brw->vs.prog_data->outputs_written; - /* _NEW_LIGHT */ - key.do_flat_shading = (ctx->Light.ShadeModel == GL_FLAT); + /* BRW_NEW_FRAGMENT_PROGRAM, _NEW_LIGHT */ + key.has_flat_shading = 0; + for (i = 0; i < BRW_VERT_RESULT_MAX; i++) { + if (brw->interpolation_mode[i] == INTERP_QUALIFIER_FLAT) { + key.has_flat_shading = 1; + break; + } + } key.pv_first = (ctx->Light.ProvokingVertex == GL_FIRST_VERTEX_CONVENTION); - /* BRW_NEW_FRAGMENT_PROGRAM, _NEW_LIGHT */ memcpy(key.interpolation_mode, brw->interpolation_mode, BRW_VERT_RESULT_MAX); /* _NEW_TRANSFORM (also part of VUE map)*/ diff --git a/src/mesa/drivers/dri/i965/brw_clip.h b/src/mesa/drivers/dri/i965/brw_clip.h index e78d074..3ad2e13 100644 --- a/src/mesa/drivers/dri/i965/brw_clip.h +++ b/src/mesa/drivers/dri/i965/brw_clip.h @@ -46,7 +46,7 @@ struct brw_clip_prog_key { unsigned char interpolation_mode[BRW_VERT_RESULT_MAX]; /* copy of the main context */ GLuint primitive:4; GLuint nr_userclip:4; - GLuint do_flat_shading:1; + GLuint has_flat_shading:1; GLuint pv_first:1; GLuint do_unfilled:1; GLuint fill_cw:2; /* includes cull information */ @@ -166,8 +166,8 @@ void brw_clip_kill_thread(struct brw_clip_compile *c); struct brw_reg brw_clip_plane_stride( struct brw_clip_compile *c ); struct brw_reg brw_clip_plane0_address( struct brw_clip_compile *c ); -void brw_clip_copy_colors( struct brw_clip_compile *c, - GLuint to, GLuint from ); +void brw_clip_copy_flatshaded_attributes( struct brw_clip_compile *c, + GLuint to, GLuint from ); void brw_clip_init_clipmask( struct brw_clip_compile *c ); diff --git a/src/mesa/drivers/dri/i965/brw_clip_line.c b/src/mesa/drivers/dri/i965/brw_clip_line.c index 6cf2bd2..729d8c0 100644 --- a/src/mesa/drivers/dri/i965/brw_clip_line.c +++ b/src/mesa/drivers/dri/i965/brw_clip_line.c @@ -271,11 +271,11 @@ void brw_emit_line_clip( struct brw_clip_compile *c ) brw_clip_line_alloc_regs(c); brw_clip_init_ff_sync(c); - if (c->key.do_flat_shading) { + if (c->key.has_flat_shading) { if (c->key.pv_first) - brw_clip_copy_colors(c, 1, 0); + brw_clip_copy_flatshaded_attributes(c, 1, 0); else - brw_clip_copy_colors(c, 0, 1); + brw_clip_copy_flatshaded_attributes(c, 0, 1); } clip_and_emit_line(c); diff --git a/src/mesa/drivers/dri/i965/brw_clip_tri.c b/src/mesa/drivers/dri/i965/brw_clip_tri.c index a29f8e0..71225f5 100644 --- a/src/mesa/drivers/dri/i965/brw_clip_tri.c +++ b/src/mesa/drivers/dri/i965/brw_clip_tri.c @@ -187,8 +187,8 @@ void brw_clip_tri_flat_shade( struct brw_clip_compile *c ) brw_IF(p, BRW_EXECUTE_1); { - brw_clip_copy_colors(c, 1, 0); - brw_clip_copy_colors(c, 2, 0); + brw_clip_copy_flatshaded_attributes(c, 1, 0); + brw_clip_copy_flatshaded_attributes(c, 2, 0); } brw_ELSE(p); { @@ -200,19 +200,19 @@ void brw_clip_tri_flat_shade( struct brw_clip_compile *c ) brw_imm_ud(_3DPRIM_TRIFAN)); brw_IF(p, BRW_EXECUTE_1); { - brw_clip_copy_colors(c, 0, 1); - brw_clip_copy_colors(c, 2, 1); + brw_clip_copy_flatshaded_attributes(c, 0, 1); + brw_clip_copy_flatshaded_attributes(c, 2, 1); } brw_ELSE(p); { - brw_clip_copy_colors(c, 1, 0); - brw_clip_copy_colors(c, 2, 0); + brw_clip_copy_flatshaded_attributes(c, 1, 0); + brw_clip_copy_flatshaded_attributes(c, 2, 0); } brw_ENDIF(p); } else { - brw_clip_copy_colors(c, 0, 2); - brw_clip_copy_colors(c, 1, 2); + brw_clip_copy_flatshaded_attributes(c, 0, 2); + brw_clip_copy_flatshaded_attributes(c, 1, 2); } } brw_ENDIF(p); @@ -606,8 +606,8 @@ void brw_emit_tri_clip( struct brw_clip_compile *c ) * flatshading, need to apply the flatshade here because we don't * respect the PV when converting to trifan for emit: */ - if (c->key.do_flat_shading) - brw_clip_tri_flat_shade(c); + if (c->key.has_flat_shading) + brw_clip_tri_flat_shade(c); if ((c->key.clip_mode == BRW_CLIPMODE_NORMAL) || (c->key.clip_mode == BRW_CLIPMODE_KERNEL_CLIP)) diff --git a/src/mesa/drivers/dri/i965/brw_clip_unfilled.c b/src/mesa/drivers/dri/i965/brw_clip_unfilled.c index 03c7d42..96f9a84 100644 --- a/src/mesa/drivers/dri/i965/brw_clip_unfilled.c +++ b/src/mesa/drivers/dri/i965/brw_clip_unfilled.c @@ -502,7 +502,7 @@ void brw_emit_unfilled_clip( struct brw_clip_compile *c ) /* Need to do this whether we clip or not: */ - if (c->key.do_flat_shading) + if (c->key.has_flat_shading) brw_clip_tri_flat_shade(c); brw_clip_init_clipmask(c); diff --git a/src/mesa/drivers/dri/i965/brw_clip_util.c b/src/mesa/drivers/dri/i965/brw_clip_util.c index bf8cc3a..692573e 100644 --- a/src/mesa/drivers/dri/i965/brw_clip_util.c +++ b/src/mesa/drivers/dri/i965/brw_clip_util.c @@ -165,7 +165,7 @@ void brw_clip_interp_vertex( struct brw_clip_compile *c, vert_result == VERT_RESULT_CLIP_DIST1) { /* PSIZ doesn't need interpolation because it isn't used by the * fragment shader. CLIP_DIST0 and CLIP_DIST1 don't need - * intepolation because on pre-GEN6, these are just placeholder VUE + * interpolation because on pre-GEN6, these are just placeholder VUE * slots that don't perform any action. */ } else if (vert_result < VERT_RESULT_MAX) { @@ -291,49 +291,25 @@ struct brw_reg brw_clip_plane_stride( struct brw_clip_compile *c ) } -/* If flatshading, distribute color from provoking vertex prior to +/* Distribute flatshaded attributes from provoking vertex prior to * clipping. */ -void brw_clip_copy_colors( struct brw_clip_compile *c, - GLuint to, GLuint from ) +void brw_clip_copy_flatshaded_attributes( struct brw_clip_compile *c, + GLuint to, GLuint from ) { struct brw_compile *p = &c->func; - - if (brw_clip_have_vert_result(c, VERT_RESULT_COL0)) - brw_MOV(p, - byte_offset(c->reg.vertex[to], - brw_vert_result_to_offset(&c->vue_map, - VERT_RESULT_COL0)), - byte_offset(c->reg.vertex[from], - brw_vert_result_to_offset(&c->vue_map, - VERT_RESULT_COL0))); - - if (brw_clip_have_vert_result(c, VERT_RESULT_COL1)) - brw_MOV(p, - byte_offset(c->reg.vertex[to], - brw_vert_result_to_offset(&c->vue_map, - VERT_RESULT_COL1)), - byte_offset(c->reg.vertex[from], - brw_vert_result_to_offset(&c->vue_map, - VERT_RESULT_COL1))); - - if (brw_clip_have_vert_result(c, VERT_RESULT_BFC0)) - brw_MOV(p, - byte_offset(c->reg.vertex[to], - brw_vert_result_to_offset(&c->vue_map, - VERT_RESULT_BFC0)), - byte_offset(c->reg.vertex[from], - brw_vert_result_to_offset(&c->vue_map, - VERT_RESULT_BFC0))); - - if (brw_clip_have_vert_result(c, VERT_RESULT_BFC1)) - brw_MOV(p, - byte_offset(c->reg.vertex[to], - brw_vert_result_to_offset(&c->vue_map, - VERT_RESULT_BFC1)), - byte_offset(c->reg.vertex[from], - brw_vert_result_to_offset(&c->vue_map, - VERT_RESULT_BFC1))); + struct brw_context *brw = p->brw; + GLuint i; + + for (i = 0; i < BRW_VERT_RESULT_MAX; i++) { + if (brw->interpolation_mode[i] == INTERP_QUALIFIER_FLAT) { + brw_MOV(p, + byte_offset(c->reg.vertex[to], + brw_vue_slot_to_offset(i)), + byte_offset(c->reg.vertex[from], + brw_vue_slot_to_offset(i))); + } + } } diff --git a/src/mesa/drivers/dri/i965/brw_sf_emit.c b/src/mesa/drivers/dri/i965/brw_sf_emit.c index c99578a..2e9beed 100644 --- a/src/mesa/drivers/dri/i965/brw_sf_emit.c +++ b/src/mesa/drivers/dri/i965/brw_sf_emit.c @@ -177,6 +177,14 @@ static GLuint count_flatshaded_attributes(struct brw_sf_compile *c ) if (brw->interpolation_mode[i] == INTERP_QUALIFIER_FLAT) count++; } + + /* This should only be called if there is at least one flatshaded + * attribute. While nothing should break if there isn't any, the + * generated code would be heavily pessimized. So check that all + * is well. + */ + assert(count != 0); + return count; }