From patchwork Thu Jul 26 18:48:28 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 1244571 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id 5EBEC3FDCA for ; Thu, 26 Jul 2012 20:01:15 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 35B8CA0E83 for ; Thu, 26 Jul 2012 13:01:15 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wg0-f43.google.com (mail-wg0-f43.google.com [74.125.82.43]) by gabe.freedesktop.org (Postfix) with ESMTP id 28CA39E790 for ; Thu, 26 Jul 2012 12:56:10 -0700 (PDT) Received: by wgbdr1 with SMTP id dr1so1724686wgb.12 for ; Thu, 26 Jul 2012 12:56:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=pCySWsv18JHJVMGoYuqWPRo9HpQb0Mmq/GFrpM9wWIs=; b=AArOmZKNQewfrxth9e4oPpOg6ZpIdqtDDmngBJbXLwL1i3nt/klr+/pW3WDBYMMA74 X345ptR6PYrdUlIKj43OxYzGAQ/o5udTd9k6HJoL2NhyerJ7C4bnl0tvEpkZi+G12t7V qlWRfrH0yZEQkQHip++J1s3SXVnwc/+hx17kQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=pCySWsv18JHJVMGoYuqWPRo9HpQb0Mmq/GFrpM9wWIs=; b=KcLlVaJUzMPfdHeXspZCrrphKgU9sSRA6OxTMgRcFnx9bFEEgf3I4CJKJ2Gd3s02C9 P5Eykxj7RlsWcMXNlR/bAw123Fzeoiw6n4mChpd55bZv7/GlSGSDd2BYvchS3t0BC58t mcLP1SWD3uLU7EsSQu1SVkZuM4lMtpi8EI8xAAggMj/VryT4mRY/YzaRRq9fwYLzTtLd eXH3mNX0i9TZvLicN0Ji/NrEncewxV5gNNkG1suRPJEyjArAkefeka9KBSVk/wond1Yv MQxZnpnWpa5LbMiIqTZRT8ChcIt867W2c/l+Ot2AvbIg381Crp18vcQdCkImK4b2AsWj IwJQ== Received: by 10.216.237.25 with SMTP id x25mr25490weq.30.1343332569288; Thu, 26 Jul 2012 12:56:09 -0700 (PDT) Received: from wespe.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id fr4sm391403wib.8.2012.07.26.12.56.08 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 26 Jul 2012 12:56:08 -0700 (PDT) From: Daniel Vetter To: Intel Graphics Development Date: Thu, 26 Jul 2012 20:48:28 +0200 Message-Id: <1343328581-2324-4-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1343328581-2324-1-git-send-email-daniel.vetter@ffwll.ch> References: <1343328581-2324-1-git-send-email-daniel.vetter@ffwll.ch> X-Gm-Message-State: ALoCoQm6wC6jW05xnRhQnTytZ3dwpyDyUfac5wDAqJyzISXqtV2g+xDtLtrjM9/H8Sh+sei8HOwl Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 03/76] drm/i915/ns2501: kill pll A enabling hack X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org With the pipe A quirk properly fixed up for i830M, this shouldn't be required any longer. Signed-Off-by: Daniel Vetter --- drivers/gpu/drm/i915/dvo_ns2501.c | 7 ------- drivers/gpu/drm/i915/intel_display.c | 2 +- 2 files changed, 1 insertion(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/dvo_ns2501.c b/drivers/gpu/drm/i915/dvo_ns2501.c index 1a0bad9..6bd383d 100644 --- a/drivers/gpu/drm/i915/dvo_ns2501.c +++ b/drivers/gpu/drm/i915/dvo_ns2501.c @@ -75,11 +75,6 @@ struct ns2501_priv { #define NSPTR(d) ((NS2501Ptr)(d->DriverPrivate.ptr)) /* - * Include the PLL launcher prototype - */ -extern void intel_enable_pll(struct drm_i915_private *dev_priv, enum pipe pipe); - -/* * For reasons unclear to me, the ns2501 at least on the Fujitsu/Siemens * laptops does not react on the i2c bus unless * both the PLL is running and the display is configured in its native @@ -113,8 +108,6 @@ static void enable_dvo(struct intel_dvo_device *dvo) I915_WRITE(DVOC_SRCDIM, 0x400300); // 1024x768 I915_WRITE(FW_BLC, 0x1080304); - intel_enable_pll(dev_priv, 0); - I915_WRITE(DVOC, 0x90004084); } diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 21eff8b..1504c36 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1431,7 +1431,7 @@ static void assert_pch_ports_disabled(struct drm_i915_private *dev_priv, * * Unfortunately needed by dvo_ns2501 since the dvo depends on it running. */ -void intel_enable_pll(struct drm_i915_private *dev_priv, enum pipe pipe) +static void intel_enable_pll(struct drm_i915_private *dev_priv, enum pipe pipe) { int reg; u32 val;