From patchwork Thu Jul 26 18:49:23 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 1245301 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id 5787F3FC33 for ; Thu, 26 Jul 2012 20:46:07 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1FFFB9E747 for ; Thu, 26 Jul 2012 13:46:07 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wi0-f177.google.com (mail-wi0-f177.google.com [209.85.212.177]) by gabe.freedesktop.org (Postfix) with ESMTP id 116E59E790 for ; Thu, 26 Jul 2012 12:57:26 -0700 (PDT) Received: by mail-wi0-f177.google.com with SMTP id hm11so1801934wib.12 for ; Thu, 26 Jul 2012 12:57:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=DR5MofoBJCc6E8JzBGWqdxwvZOaWixbPM3qWxMFlkMY=; b=AgwamVyhBfWxDK1FpNcpFM+dNVSTo63XVh/0vuehRURkHAd4kRi7r4wDKtfn5hj61L FAsyFKV7z8DCJ/5XTTnfieAbTiE7LK3mYrVAARujsjoQI31JY7mDM0ZkOePL4aaOP6eW PTChPH9Fzf/Zo5mIujcMx1hWcwad9b03WYf6g= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=DR5MofoBJCc6E8JzBGWqdxwvZOaWixbPM3qWxMFlkMY=; b=hrQeKvpgw1seFTqkfgETRWJlbd/wp0KGzn1xUqqPNghU1X/lgjMx2yDwCEyeAp/m3F 7al3G+pl/ZFi/soeFVgX3jrXyoSlmFRTazXlyjFFYFeaGUurDrBYvQLLhydJYMA/6aPQ L6H9Wn284KK3TqVJeIL9Z2L3E7kTeckQ/PUkjSeIr3zejdAaBARa6wRpbBGZuXFO+giV mnn25ATeGzkYDEQaGocG/lYW4jdDF6PTQ2LKfNyf/klvSQjk+yxsPxrY+oXaYhy5Kj5n xEF+UXFQhEsmILtyV2D/ONI8pBvF2fRg2SduRxnNWwR33khHFYuryEasBcc6uwD9tOlL LD9Q== Received: by 10.180.90.207 with SMTP id by15mr16050113wib.22.1343332646819; Thu, 26 Jul 2012 12:57:26 -0700 (PDT) Received: from wespe.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id fr4sm391403wib.8.2012.07.26.12.57.25 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 26 Jul 2012 12:57:26 -0700 (PDT) From: Daniel Vetter To: Intel Graphics Development Date: Thu, 26 Jul 2012 20:49:23 +0200 Message-Id: <1343328581-2324-59-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1343328581-2324-1-git-send-email-daniel.vetter@ffwll.ch> References: <1343328581-2324-1-git-send-email-daniel.vetter@ffwll.ch> X-Gm-Message-State: ALoCoQnXKsqnU7e+4ebsd7RgbvX05GXsDGWQejNXHVyWZy12M0PVRUuYTFNufWKWb2YXtso7bkHX Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 58/76] drm/i915: compute masks of crtcs affected in set_mode X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org This is definetely a bit more generic than currently required, but if we keep track of all crtcs that need to be disabled/enable (because they loose an encoder or something similar), crtcs that get completely disabled and those that we need to do an actual mode change on nicely prepares us for global modeset operations on multiple crtcs. The only big thing missing here would be a global resource allocation step (for e.g. pch plls), which would equally frob these bitmasks if e.g. a crtc only needs a new pll. These masks aren't yet put to use in this patch, this will follow in the next one. v2-v5: Fix up the computations for good (hopefully). Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_display.c | 89 ++++++++++++++++++++++++++++++++++ 1 file changed, 89 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 021dde1..0a116d5 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -6633,6 +6633,91 @@ fail: return ERR_PTR(-EINVAL); } +/* Computes which crtcs are affected and sets the relevant bits in the mask. For + * simplicity we use the crtc's pipe number (because it's easier to obtain). */ +static void +intel_modeset_affected_pipes(struct drm_crtc *crtc, unsigned *modeset_pipes, + unsigned *prepare_pipes, unsigned *disable_pipes) +{ + struct intel_crtc *intel_crtc; + struct drm_device *dev = crtc->dev; + struct intel_encoder *encoder; + struct intel_connector *connector; + struct drm_crtc *tmp_crtc; + + *disable_pipes = *modeset_pipes = *prepare_pipes = 0; + + /* Check which crtcs have changed outputs connected to them, these need + * to be part of the prepare_pipes mask. We don't (yet) support global + * modeset across multiple crtcs, so modeset_pipes will only have one + * bit set at most. */ + list_for_each_entry(connector, &dev->mode_config.connector_list, + base.head) { + if (connector->base.encoder == &connector->new_encoder->base) + continue; + + if (connector->base.encoder) { + tmp_crtc = connector->base.encoder->crtc; + + *prepare_pipes |= 1 << to_intel_crtc(tmp_crtc)->pipe; + } + + if (connector->new_encoder) + *prepare_pipes |= + 1 << connector->new_encoder->new_crtc->pipe; + } + + list_for_each_entry(encoder, &dev->mode_config.encoder_list, + base.head) { + if (encoder->base.crtc == &encoder->new_crtc->base) + continue; + + if (encoder->base.crtc) { + tmp_crtc = encoder->base.crtc; + + *prepare_pipes |= 1 << to_intel_crtc(tmp_crtc)->pipe; + } + + if (encoder->new_crtc) + *prepare_pipes |= 1 << encoder->new_crtc->pipe; + } + + /* Check for any pipes that will be fully disabled ... */ + list_for_each_entry(intel_crtc, &dev->mode_config.crtc_list, + base.head) { + bool used = false; + + /* Don't try to disable disabled crtcs. */ + if (!intel_crtc->base.enabled) + continue; + + list_for_each_entry(encoder, &dev->mode_config.encoder_list, + base.head) { + if (encoder->new_crtc == intel_crtc) + used = true; + } + + if (!used) + *disable_pipes |= 1 << intel_crtc->pipe; + } + + + /* set_mode is also used to update properties on life display pipes. */ + intel_crtc = to_intel_crtc(crtc); + if (!*disable_pipes && crtc->enabled) + *prepare_pipes |= 1 << intel_crtc->pipe; + + /* We only support modeset on one single crtc, hence we need to do that + * only for the passed in crtc iff we change anything else than just + * disable crtcs. */ + if (*prepare_pipes) + *modeset_pipes |= 1 << intel_crtc->pipe; + + /* ... and mask these out. */ + *modeset_pipes &= ~(*disable_pipes); + *prepare_pipes &= ~(*disable_pipes); +} + bool intel_set_mode(struct drm_crtc *crtc, struct drm_display_mode *mode, int x, int y, struct drm_framebuffer *fb) @@ -6642,8 +6727,12 @@ bool intel_set_mode(struct drm_crtc *crtc, struct drm_display_mode *adjusted_mode, saved_mode, saved_hwmode; struct drm_encoder_helper_funcs *encoder_funcs; struct drm_encoder *encoder; + unsigned disable_pipe, prepare_pipes, modeset_pipes; bool ret = true; + intel_modeset_affected_pipes(crtc, &modeset_pipes, + &prepare_pipes, &disable_pipe); + intel_modeset_commit_output_state(dev); crtc->enabled = drm_helper_crtc_in_use(crtc);