From patchwork Thu Jul 26 18:49:40 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 1245561 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id 89FA73FC33 for ; Thu, 26 Jul 2012 20:58:21 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4A50AA0EFB for ; Thu, 26 Jul 2012 13:58:21 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-we0-f177.google.com (mail-we0-f177.google.com [74.125.82.177]) by gabe.freedesktop.org (Postfix) with ESMTP id 869159E737 for ; Thu, 26 Jul 2012 12:57:50 -0700 (PDT) Received: by mail-we0-f177.google.com with SMTP id r3so1738755wey.36 for ; Thu, 26 Jul 2012 12:57:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=ZSfTavSlxGlz8DTdCK5Nain0RAxuHBQbhzbOas5Yw94=; b=FcHJu8YzsYj+ONSsq3NCIvWubyYtUWeOjhwzHhvUxVWIcuTnX8JIMhgIzvNuzYAmND 3ww/xKpJDpzjKfYBUSNSeofXVUy341DD62VrcLqfpdRsBDoCCfFC68TgmjoYhkk2yp2N +o50cshYRT6T0h8m35++9UgGVzZd/J1GVSBxQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=ZSfTavSlxGlz8DTdCK5Nain0RAxuHBQbhzbOas5Yw94=; b=MDAyDMAuv/Ys+CVEaiJbnH8DGHTK4SDnY7MCRqjlxJoE5juxTg7pWvaL71OjyDKySI h0uDS9+GAosY7e5BC3PBY+xoPjsmM5WCLk0UvpK5lOW6nR3hbam3t77IQHKn2EACQv2U L/0eTuBmUmXDm6/fn6e7pPlxkilMdZpzgXWW9xlWj5DiGFP7ALS6HU7J2X/g4bmoA7F6 URC57K9HG39fmOgBxIGqEl9URf6aB5TIx2aWiQTjaaonCulHxzugmBDhICk9ImHU65kI trAjUZaTkT6IXjThXPg7ucasS+0ecl7qOMc2kfMEsBL8EY/0OjvzGProPMatgMomcjuB M95A== Received: by 10.180.97.33 with SMTP id dx1mr77446wib.18.1343332670184; Thu, 26 Jul 2012 12:57:50 -0700 (PDT) Received: from wespe.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id fr4sm391403wib.8.2012.07.26.12.57.48 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 26 Jul 2012 12:57:49 -0700 (PDT) From: Daniel Vetter To: Intel Graphics Development Date: Thu, 26 Jul 2012 20:49:40 +0200 Message-Id: <1343328581-2324-76-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1343328581-2324-1-git-send-email-daniel.vetter@ffwll.ch> References: <1343328581-2324-1-git-send-email-daniel.vetter@ffwll.ch> X-Gm-Message-State: ALoCoQmgCwINT+LuV7PhG6TwL9uhw1Da4I1Dj62KgltKWbFg9ojq9LEJ0/S/N/Ee7Mswb4GuCBj5 Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 75/76] drm/i915: disable the cpu edp port after the cpu pipe X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org See bspec, Vol3 Part2, Section 1.1.3 "Display Mode Set Sequence". This applies to all platforms where we currently support eDP on, i.e. ilk, snb & ivb. Without this change we fail to light up the eDP port on previously unused crtcs (likely because something is stuck on the old pipe), and we also fail to properly disable the old pipe (i.e. bit 30 in the PIPECONF register is stuck as set until the next reboot). Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=44001 Signed-Off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_dp.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index d825fa9..42209e4 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -1314,16 +1314,23 @@ static void intel_disable_dp(struct intel_encoder *encoder) ironlake_edp_panel_off(intel_dp); intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); - intel_dp_link_down(intel_dp); - ironlake_edp_panel_vdd_off(intel_dp, false); + + /* cpu edp my only be disable _after_ the cpu pipe/plane is disabled. */ + if (!is_cpu_edp(intel_dp)) { + intel_dp_link_down(intel_dp); + ironlake_edp_panel_vdd_off(intel_dp, false); + } } static void intel_post_disable_dp(struct intel_encoder *encoder) { struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); - if (is_cpu_edp(intel_dp)) + if (is_cpu_edp(intel_dp)) { + intel_dp_link_down(intel_dp); + ironlake_edp_panel_vdd_off(intel_dp, false); ironlake_edp_pll_off(intel_dp); + } } static void intel_enable_dp(struct intel_encoder *encoder)