From patchwork Wed Aug 8 17:15:27 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paulo Zanoni X-Patchwork-Id: 1296871 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id 21585DF223 for ; Wed, 8 Aug 2012 17:16:57 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 04DD9A0A7F for ; Wed, 8 Aug 2012 10:16:57 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-yw0-f49.google.com (mail-yw0-f49.google.com [209.85.213.49]) by gabe.freedesktop.org (Postfix) with ESMTP id C3076A0AAA for ; Wed, 8 Aug 2012 10:16:04 -0700 (PDT) Received: by yhjj52 with SMTP id j52so1095279yhj.36 for ; Wed, 08 Aug 2012 10:16:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=bkhylj2zQ4CD+MwzTvwXJLgZ7CLT0u9vD64RfAypAyY=; b=FRsQEkw/ccvx0B7Il+16gLjA/26qcVOuBQUEYzmsPKEYHuPzhaHrc6UsVzoVlgr6Pb 2jsrhDFqQUT4DUYA79ryrEDWqKLO5QDsIWHdu0H4lkfKfEEVeaK5zGbg7utOoLOaonQe MOh3CXZYQTdH9nft3JLNnW+tOJ/SA3CqOBZTPy04v0X9NM2PMPWXDYZ+oHQ92q5R4mNb Y5V4mLHl8M4DoMr12si9EEVhvxMmF6N7lH4KjFl3SJ0uxoDBJno5CFO3bGuXdnJu6edE WeyyWczNFgl1svYxHJXjVsGs+7Y+FBSGB9GiLvN+M10tH4tydSiehXvM54xOouVuho5/ 6lZg== Received: by 10.236.144.165 with SMTP id n25mr17679211yhj.61.1344446164075; Wed, 08 Aug 2012 10:16:04 -0700 (PDT) Received: from vicky.domain.invalid ([177.40.34.45]) by mx.google.com with ESMTPS id s17sm7583724anj.13.2012.08.08.10.16.02 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 08 Aug 2012 10:16:03 -0700 (PDT) From: Paulo Zanoni To: intel-gfx@lists.freedesktop.org Date: Wed, 8 Aug 2012 14:15:27 -0300 Message-Id: <1344446134-3704-2-git-send-email-przanoni@gmail.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1344446134-3704-1-git-send-email-przanoni@gmail.com> References: <1344446134-3704-1-git-send-email-przanoni@gmail.com> Cc: Paulo Zanoni Subject: [Intel-gfx] [PATCH 1/8] drm/i915: fix pipe DDI mode select X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org From: Paulo Zanoni Mask the value before changing it and also select DVI when needed. DVI was working in cases where the BIOS was setting the correct value because we were not masking the value before changing it. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_ddi.c | 7 ++++++- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 1310caa..97f00fb 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -4302,6 +4302,7 @@ /* Those bits are ignored by pipe EDP since it can only connect to DDI A */ #define PIPE_DDI_PORT_MASK (7<<28) #define PIPE_DDI_SELECT_PORT(x) ((x)<<28) +#define PIPE_DDI_MODE_SELECT_MASK (7<<24) #define PIPE_DDI_MODE_SELECT_HDMI (0<<24) #define PIPE_DDI_MODE_SELECT_DVI (1<<24) #define PIPE_DDI_MODE_SELECT_DP_SST (2<<24) diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 32604ac..0d7acd7 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -726,13 +726,18 @@ void intel_ddi_mode_set(struct drm_encoder *encoder, temp = I915_READ(DDI_FUNC_CTL(pipe)); temp &= ~PIPE_DDI_PORT_MASK; temp &= ~PIPE_DDI_BPC_12; + temp &= ~PIPE_DDI_MODE_SELECT_MASK; temp |= PIPE_DDI_SELECT_PORT(port) | - PIPE_DDI_MODE_SELECT_HDMI | ((intel_crtc->bpp > 24) ? PIPE_DDI_BPC_12 : PIPE_DDI_BPC_8) | PIPE_DDI_FUNC_ENABLE; + if (intel_hdmi->has_hdmi_sink) + temp |= PIPE_DDI_MODE_SELECT_HDMI; + else + temp |= PIPE_DDI_MODE_SELECT_DVI; + I915_WRITE(DDI_FUNC_CTL(pipe), temp); intel_hdmi->set_infoframes(encoder, adjusted_mode);