From patchwork Wed Aug 8 17:15:28 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paulo Zanoni X-Patchwork-Id: 1296891 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id 2C006DF223 for ; Wed, 8 Aug 2012 17:17:34 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1460D9ED8A for ; Wed, 8 Aug 2012 10:17:34 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-yx0-f177.google.com (mail-yx0-f177.google.com [209.85.213.177]) by gabe.freedesktop.org (Postfix) with ESMTP id 1B8B8A0AA0 for ; Wed, 8 Aug 2012 10:16:09 -0700 (PDT) Received: by mail-yx0-f177.google.com with SMTP id r9so1099933yen.36 for ; Wed, 08 Aug 2012 10:16:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=zRQPyXNay15zPSGF27Vrz5PTPp90u6tXjptmJYL/AlI=; b=vlAAF0scEfQ2mnk7iteft+7Dy18+ACl6OROd7sb+QivAfTD0GcnK21WuQR9Olh7ofz KB1gw3jtsTKluvIKTPGFY50Zd28bmfK1XUI7pkTctZmRHwadD2CXxyRboBuk3x451G4L bXOVmCW9v9CLuFnZx1Z0deLwNBUiCLc91HEFGbgoo0xO0zlNva7LEYmL5PnTmd8NEYLy idEEuAiw2FXJmZsvBiC6XRcDH1Km12RoZLrQnDe3Zu4Y5S1/RnVRKODZhXCGxFrPxpN/ 4/5P/2cSS4eT+w26oxpIPMYI1b14w8CO1LdT63RwNcdLz5NyMX6OXs2/twrZhOVPEwPx 5XBQ== Received: by 10.236.73.36 with SMTP id u24mr10458576yhd.103.1344446168845; Wed, 08 Aug 2012 10:16:08 -0700 (PDT) Received: from vicky.domain.invalid ([177.40.34.45]) by mx.google.com with ESMTPS id s17sm7583724anj.13.2012.08.08.10.16.07 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 08 Aug 2012 10:16:08 -0700 (PDT) From: Paulo Zanoni To: intel-gfx@lists.freedesktop.org Date: Wed, 8 Aug 2012 14:15:28 -0300 Message-Id: <1344446134-3704-3-git-send-email-przanoni@gmail.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1344446134-3704-1-git-send-email-przanoni@gmail.com> References: <1344446134-3704-1-git-send-email-przanoni@gmail.com> Cc: Paulo Zanoni Subject: [Intel-gfx] [PATCH 2/8] drm/i915: set the DDI sync polarity bits X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org From: Paulo Zanoni During my tests, everything worked even if the wrong polarity was set. Still, we should try to set the correct values. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/i915_reg.h | 2 ++ drivers/gpu/drm/i915/intel_ddi.c | 6 ++++++ 2 files changed, 8 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 97f00fb..896b279 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -4312,6 +4312,8 @@ #define PIPE_DDI_BPC_10 (1<<20) #define PIPE_DDI_BPC_6 (2<<20) #define PIPE_DDI_BPC_12 (3<<20) +#define PIPE_DDI_PVSYNC (1<<17) +#define PIPE_DDI_PHSYNC (1<<16) #define PIPE_DDI_BFI_ENABLE (1<<4) #define PIPE_DDI_PORT_WIDTH_X1 (0<<1) #define PIPE_DDI_PORT_WIDTH_X2 (1<<1) diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 0d7acd7..1fbd67c 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -727,6 +727,7 @@ void intel_ddi_mode_set(struct drm_encoder *encoder, temp &= ~PIPE_DDI_PORT_MASK; temp &= ~PIPE_DDI_BPC_12; temp &= ~PIPE_DDI_MODE_SELECT_MASK; + temp &= ~(PIPE_DDI_PVSYNC | PIPE_DDI_PHSYNC); temp |= PIPE_DDI_SELECT_PORT(port) | ((intel_crtc->bpp > 24) ? PIPE_DDI_BPC_12 : @@ -738,6 +739,11 @@ void intel_ddi_mode_set(struct drm_encoder *encoder, else temp |= PIPE_DDI_MODE_SELECT_DVI; + if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) + temp |= PIPE_DDI_PVSYNC; + if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) + temp |= PIPE_DDI_PHSYNC; + I915_WRITE(DDI_FUNC_CTL(pipe), temp); intel_hdmi->set_infoframes(encoder, adjusted_mode);