From patchwork Wed Aug 8 21:35:37 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 1297691 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id 8DC7B3FCFC for ; Wed, 8 Aug 2012 21:22:57 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 799C09F000 for ; Wed, 8 Aug 2012 14:22:57 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-we0-f177.google.com (mail-we0-f177.google.com [74.125.82.177]) by gabe.freedesktop.org (Postfix) with ESMTP id A7C35A0AE2 for ; Wed, 8 Aug 2012 14:19:13 -0700 (PDT) Received: by mail-we0-f177.google.com with SMTP id r3so863605wey.36 for ; Wed, 08 Aug 2012 14:19:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=NxRCzzoxWTaTMAmU9tMy+fEsK3UD5NbkrptfSaiR9D0=; b=dJOI+swAriDDQOv2ewzRhffIY3EAjFcBl5/hwoBLTr5umi27QaPlEtKV4stRM3kbTN bRKcURazwBUZDFXDFa0UtzEHU5Kcr/qONKnQx7MYX2GkhVfFRx7K9MXQoIdStPCaXjDf /l2y0A9eqTsO2HRvfyrJZoy+ZM/XD2j6NludQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=NxRCzzoxWTaTMAmU9tMy+fEsK3UD5NbkrptfSaiR9D0=; b=AdoXiNjSjEMwnDQJu29JOuMh0G4sV9tQ1xkmImutUzaJWddr3yjdvgv/0JeKppgAJi MncRbEg0dZ3T/QCx4jGnf4eA7+4641IHyYDCTEC7+PfsoCEPY8tuoASpeijs6mfUELKj 5UMCbYFWfGWOxeykbtyaWia2NMzF3KupoUp1RAhZ/N1fKh8QYdN4qlcdNgH7NcJcH/IM 8/Alfu3+QMgKEX7WsaiCoCpT0GlLYG2AN+1YpxHRErC1zchWhWmOwTWhNYYVl9tP4sbv TqnXDvjGB4zWmDr9AvxjmnyUiuM6HWqnywbACXJMFRPEz682oEzDFa4QMbctptUbmJhz ZIdQ== Received: by 10.216.133.200 with SMTP id q50mr9133684wei.166.1344460753228; Wed, 08 Aug 2012 14:19:13 -0700 (PDT) Received: from hummel.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id o2sm10646321wiz.11.2012.08.08.14.19.11 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 08 Aug 2012 14:19:12 -0700 (PDT) From: Daniel Vetter To: Intel Graphics Development Date: Wed, 8 Aug 2012 23:35:37 +0200 Message-Id: <1344461740-1231-6-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1344461740-1231-1-git-send-email-daniel.vetter@ffwll.ch> References: <1344461740-1231-1-git-send-email-daniel.vetter@ffwll.ch> X-Gm-Message-State: ALoCoQkO4uOjtKtrGhqop+sERXnNd6sViA8LeMvIkVFkE+iTvSj9LtJb2J4R5TTcV48qdeg26F3b Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 5/8] drm/i915: DE_PCU_EVENT irq is ilk-only X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Like all the other drps/ips stuff. Hence add the corresponding check, give the function a preciser prefix and move the single reg clearing into the rps handling function, too. Reviewed-by: Ben Widawsky Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/i915_irq.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 74c9a0e..3e203da 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -296,12 +296,14 @@ static void i915_hotplug_work_func(struct work_struct *work) drm_helper_hpd_irq_event(dev); } -static void i915_handle_rps_change(struct drm_device *dev) +static void ironlake_handle_rps_change(struct drm_device *dev) { drm_i915_private_t *dev_priv = dev->dev_private; u32 busy_up, busy_down, max_avg, min_avg; u8 new_delay = dev_priv->cur_delay; + I915_WRITE16(MEMINTRSTS, I915_READ(MEMINTRSTS)); + I915_WRITE16(MEMINTRSTS, MEMINT_EVAL_CHG); busy_up = I915_READ(RCPREVBSYTUPAVG); busy_down = I915_READ(RCPREVBSYTDNAVG); @@ -794,10 +796,8 @@ static irqreturn_t ironlake_irq_handler(DRM_IRQ_ARGS) ibx_irq_handler(dev, pch_iir); } - if (de_iir & DE_PCU_EVENT) { - I915_WRITE16(MEMINTRSTS, I915_READ(MEMINTRSTS)); - i915_handle_rps_change(dev); - } + if (IS_GEN5(dev) && de_iir & DE_PCU_EVENT) + ironlake_handle_rps_change(dev); if (IS_GEN6(dev) && pm_iir & GEN6_PM_DEFERRED_EVENTS) gen6_queue_rps_work(dev_priv, pm_iir);