From patchwork Sun Aug 12 17:27:14 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 1310061 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id D6A1ADF280 for ; Sun, 12 Aug 2012 18:38:57 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id BD5179ED9F for ; Sun, 12 Aug 2012 11:38:57 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-we0-f177.google.com (mail-we0-f177.google.com [74.125.82.177]) by gabe.freedesktop.org (Postfix) with ESMTP id 3F48B9EE93 for ; Sun, 12 Aug 2012 11:34:07 -0700 (PDT) Received: by mail-we0-f177.google.com with SMTP id r3so2225712wey.36 for ; Sun, 12 Aug 2012 11:34:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=0XDDrFJ/Q6FKFj4OghZPe6e6dDhnCOgNjFgKlJrYkic=; b=UTcqQl8O9ZFfzfVfrpdeBvtwmevQwxDcB6UTFrvpP++a5tnSbKzfR7YkwEDrnnfXuw alu2kiEv4UwUI8MWWv634cq2E8yUytNvQM6NX73+jSZki5rv8gBtw1nS2Me6aJfKOoU5 ao2QjzMDCZvA9vByk72+81CkyMYbd7/Vgf+cs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=0XDDrFJ/Q6FKFj4OghZPe6e6dDhnCOgNjFgKlJrYkic=; b=LIjy7/8rxi7DachJobRZ/4t/B68pigz6If6QZhOHv3JlCa+BvOoXR7ogAZvyYqz+wR DD8Hu0lkg5NVITAqXj3/V39I+bw4Gskby0rGasU2qDstK8pPpYrfgyuzwtlJ2I2pXFOc sJ9owixc3lijDTqjCGGxgEX+lesdqt5m7XLEo3kdfdUhpZdIfEq+NI7MAjUYj05WS3KP UdVGYUE4gH7WZ3DaxgmzcgKjfLe1fmNwQxSEFf1PhELlZAcXRL04EZQgDR1zUOchwMdS 4AwYj007Mus2rJkhbNshF2scfziJZNfL5sylCATgiweGV7Grtq7D21RtNNktr4yXf6Bp JMMw== Received: by 10.180.95.193 with SMTP id dm1mr12176297wib.10.1344796446925; Sun, 12 Aug 2012 11:34:06 -0700 (PDT) Received: from wespe.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id q4sm11936645wix.9.2012.08.12.11.34.05 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 12 Aug 2012 11:34:06 -0700 (PDT) From: Daniel Vetter To: Intel Graphics Development Date: Sun, 12 Aug 2012 19:27:14 +0200 Message-Id: <1344792434-1316-8-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.11.2 In-Reply-To: <1344792434-1316-1-git-send-email-daniel.vetter@ffwll.ch> References: <1344792434-1316-1-git-send-email-daniel.vetter@ffwll.ch> X-Gm-Message-State: ALoCoQkRDhgXs+hOfK84F2rcfBI+zy/Y04SuxGjrQjy6m3rQw0Yo0KgZelrEuVH52mYA9tx0HYjZ Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 7/7] drm/i915: extract ironlake_fdi_pll_disable X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Simply to make the ilk+ crtc disable path clearer and more symmetric with the enable function. Also switch to intel_crtc for the enable function. Signed-Off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_display.c | 57 +++++++++++++++++++++--------------- 1 file changed, 33 insertions(+), 24 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 082a8a7..72e01ba 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -2708,11 +2708,10 @@ static void ivb_manual_fdi_link_train(struct drm_crtc *crtc) DRM_DEBUG_KMS("FDI train done.\n"); } -static void ironlake_fdi_pll_enable(struct drm_crtc *crtc) +static void ironlake_fdi_pll_enable(struct intel_crtc *intel_crtc) { - struct drm_device *dev = crtc->dev; + struct drm_device *dev = intel_crtc->base.dev; struct drm_i915_private *dev_priv = dev->dev_private; - struct intel_crtc *intel_crtc = to_intel_crtc(crtc); int pipe = intel_crtc->pipe; u32 reg, temp; @@ -2753,6 +2752,35 @@ static void ironlake_fdi_pll_enable(struct drm_crtc *crtc) } } +static void ironlake_fdi_pll_disable(struct intel_crtc *intel_crtc) +{ + struct drm_device *dev = intel_crtc->base.dev; + struct drm_i915_private *dev_priv = dev->dev_private; + int pipe = intel_crtc->pipe; + u32 reg, temp; + + /* Switch from PCDclk to Rawclk */ + reg = FDI_RX_CTL(pipe); + temp = I915_READ(reg); + I915_WRITE(reg, temp & ~FDI_PCDCLK); + + /* Disable CPU FDI TX PLL */ + reg = FDI_TX_CTL(pipe); + temp = I915_READ(reg); + I915_WRITE(reg, temp & ~FDI_TX_PLL_ENABLE); + + POSTING_READ(reg); + udelay(100); + + reg = FDI_RX_CTL(pipe); + temp = I915_READ(reg); + I915_WRITE(reg, temp & ~FDI_RX_PLL_ENABLE); + + /* Wait for the clocks to turn off. */ + POSTING_READ(reg); + udelay(100); +} + static void cpt_phase_pointer_disable(struct drm_device *dev, int pipe) { struct drm_i915_private *dev_priv = dev->dev_private; @@ -3200,7 +3228,7 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc) is_pch_port = intel_crtc_driving_pch(crtc); if (is_pch_port) - ironlake_fdi_pll_enable(crtc); + ironlake_fdi_pll_enable(intel_crtc); else ironlake_fdi_disable(crtc); @@ -3303,26 +3331,7 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc) /* disable PCH DPLL */ intel_disable_pch_pll(intel_crtc); - /* Switch from PCDclk to Rawclk */ - reg = FDI_RX_CTL(pipe); - temp = I915_READ(reg); - I915_WRITE(reg, temp & ~FDI_PCDCLK); - - /* Disable CPU FDI TX PLL */ - reg = FDI_TX_CTL(pipe); - temp = I915_READ(reg); - I915_WRITE(reg, temp & ~FDI_TX_PLL_ENABLE); - - POSTING_READ(reg); - udelay(100); - - reg = FDI_RX_CTL(pipe); - temp = I915_READ(reg); - I915_WRITE(reg, temp & ~FDI_RX_PLL_ENABLE); - - /* Wait for the clocks to turn off. */ - POSTING_READ(reg); - udelay(100); + ironlake_fdi_pll_disable(intel_crtc); intel_crtc->active = false; intel_update_watermarks(dev);