From patchwork Sun Aug 19 19:12:49 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 1345051 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id 734C7DF264 for ; Sun, 19 Aug 2012 20:42:05 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 58810A104E for ; Sun, 19 Aug 2012 13:42:05 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-we0-f177.google.com (mail-we0-f177.google.com [74.125.82.177]) by gabe.freedesktop.org (Postfix) with ESMTP id 5ACB1A1038 for ; Sun, 19 Aug 2012 13:20:57 -0700 (PDT) Received: by mail-we0-f177.google.com with SMTP id r3so3851112wey.36 for ; Sun, 19 Aug 2012 13:20:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=zP8QQGxFzx/91aSe4iGugGVjywig1Srde8GTpV7lV3U=; b=Ao6J1mCK5CXynojIn8Jzyjk4yuQWLvcqnj3+H6ddDC3FYE2Qj+13uFdWR+iE30EY1R SXIbdoaj2I0B5gRJbFuGg2gQYn3AxspaswCD/WqhWmyN8P9AUcyA19rfxple6YErJ0ZM 8VL4JN/m3zuLbXuh5+L3OOJd/G6xdNYXXIyxo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=zP8QQGxFzx/91aSe4iGugGVjywig1Srde8GTpV7lV3U=; b=QGUwcuYm58Y66ZweVXoxBfAtD5Q/UIxhfCzscebinjOwd87zyv9UiKlqZshGEAiVRq UQUZphE/8v1eju+ESIrXid0Qiiybhw+N9wAMO8utDf+PecWzMyk9FFnuLrQI3friZboe 4PPwmTIAhW27x8jLwI3bFIo8IURDKrNFcGv6y/lkaYjiWWYCwsAQNLPVujN03okf9Dw4 xrCNF4tuCx+ScG9L6cXJqSAh40be/wHlb2aNABeDGTD4Ql2qgInIGJNgqDu6/+68b1K8 KzV75jqbty1x3VDmYgkssO2OPfJe1JlM6kzElaihrUFYXpQCyaTZj911+BtcZHFwfS0/ UGMQ== Received: by 10.180.97.135 with SMTP id ea7mr21989903wib.11.1345407657024; Sun, 19 Aug 2012 13:20:57 -0700 (PDT) Received: from wespe.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id fu8sm24194367wib.5.2012.08.19.13.20.55 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 19 Aug 2012 13:20:56 -0700 (PDT) From: Daniel Vetter To: Intel Graphics Development Date: Sun, 19 Aug 2012 21:12:49 +0200 Message-Id: <1345403595-9678-33-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.11.2 In-Reply-To: <1345403595-9678-1-git-send-email-daniel.vetter@ffwll.ch> References: <1345403595-9678-1-git-send-email-daniel.vetter@ffwll.ch> X-Gm-Message-State: ALoCoQlzbk+7+rocZgA2FKl3VQO/9thQowlzeU/63AUxof0Fzi4oY7/BT/IBGj1iRhOBtotLMWpp Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 32/58] drm/i915: rip out intel_crtc->dpms_mode X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Afaict this has been used for two things: - To prevent the crtc enable code from being run twice. We have now intel_crtc->active to track this in a more precise way. - To ensure the code copes correctly with the unknown hw state after boot and resume. Thanks to the hw state readout and sanitize code we have now a better way to handle this. The only thing it still does is complicate our modeset state space. Having outlived its usefullness, let it just die. Signed-Off-by: Daniel Vetter Reviewed-by: Jesse Barnes --- drivers/gpu/drm/i915/intel_display.c | 17 ----------------- drivers/gpu/drm/i915/intel_drv.h | 1 - 2 files changed, 18 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 6d74e6f..2cfb397 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3470,18 +3470,10 @@ void intel_crtc_update_dpms(struct drm_crtc *crtc) struct intel_encoder *intel_encoder; int pipe = intel_crtc->pipe; bool enabled, enable = false; - int mode; for_each_encoder_on_crtc(dev, crtc, intel_encoder) enable |= intel_encoder->connectors_active; - mode = enable ? DRM_MODE_DPMS_ON : DRM_MODE_DPMS_OFF; - - if (intel_crtc->dpms_mode == mode) - return; - - intel_crtc->dpms_mode = mode; - if (enable) dev_priv->display.crtc_enable(crtc); else @@ -5037,11 +5029,6 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc, x, y, old_fb); drm_vblank_post_modeset(dev, pipe); - if (ret) - intel_crtc->dpms_mode = DRM_MODE_DPMS_OFF; - else - intel_crtc->dpms_mode = DRM_MODE_DPMS_ON; - return ret; } @@ -7621,10 +7608,6 @@ static void intel_sanitize_crtc(struct intel_crtc *crtc) struct drm_i915_private *dev_priv = dev->dev_private; u32 reg, val; - /* Clear the dpms state for compatibility with code still using that - * deprecated state variable. */ - crtc->dpms_mode = -1; - /* Clear any frame start delays used for debugging left by the BIOS */ reg = PIPECONF(crtc->pipe); I915_WRITE(reg, I915_READ(reg) & ~PIPECONF_FRAME_START_DELAY_MASK); diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index e2116d9..a7d79de 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -164,7 +164,6 @@ struct intel_crtc { enum pipe pipe; enum plane plane; u8 lut_r[256], lut_g[256], lut_b[256]; - int dpms_mode; /* * Whether the crtc and the connected output pipeline is active. Implies * that crtc->enabled is set, i.e. the current mode configuration has