From patchwork Thu Aug 23 13:04:04 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Damien Lespiau X-Patchwork-Id: 1366951 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id 94A9ADF2AB for ; Thu, 23 Aug 2012 13:05:24 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 788699E796 for ; Thu, 23 Aug 2012 06:05:24 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wg0-f43.google.com (mail-wg0-f43.google.com [74.125.82.43]) by gabe.freedesktop.org (Postfix) with ESMTP id C808A9E746 for ; Thu, 23 Aug 2012 06:04:12 -0700 (PDT) Received: by wgbdr1 with SMTP id dr1so443514wgb.12 for ; Thu, 23 Aug 2012 06:04:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:subject:date:message-id:x-mailer:in-reply-to:references; bh=l6y1urqRSNL/2QpyXeB2dWYMOBxqw73d+1qFTR6UYQA=; b=Xt7fyS12boilVGP7m0TC2I+tE/et3vfUQNMQZsW7FFII7O4h3Q3IKW4LJ/myuzrIXP QM2gkSPTc8zWTvRXuC81WLtNd/BNwySUWEF1kGhg1KA/31hkEGSZUzrUQkDbmiJ9b9ee 92Pv4MzCkty+hJ+9ssJmA2hYCYrJy2Vx1kaHQzv9kPKgqsNPfBOk10XhzlMdgFxaUpPv 3Z1kpLxbW9oAZKoo8WcDHBC53TogYnP/a2t/BMCgmXfakELCXWF8pAcamxJ9bpcDDMqc yGc9/4ZcbcQ43EhYOOqsAVdS7H/gzIlsHXeO1MyoEOiUsu43wPomDZVu/iKd08pejYea ZvJQ== Received: by 10.180.80.134 with SMTP id r6mr4023781wix.1.1345727052046; Thu, 23 Aug 2012 06:04:12 -0700 (PDT) Received: from localhost.localdomain ([83.217.123.106]) by mx.google.com with ESMTPS id j6sm20931736wiy.4.2012.08.23.06.04.10 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 23 Aug 2012 06:04:11 -0700 (PDT) From: Damien Lespiau To: intel-gfx@lists.freedesktop.org Date: Thu, 23 Aug 2012 14:04:04 +0100 Message-Id: <1345727045-4168-2-git-send-email-damien.lespiau@gmail.com> X-Mailer: git-send-email 1.7.11.4 In-Reply-To: <1345727045-4168-1-git-send-email-damien.lespiau@gmail.com> References: <1345727045-4168-1-git-send-email-damien.lespiau@gmail.com> Subject: [Intel-gfx] [PATCH 2/3] intel_reg_dumper: Dump FDI_RX_DEBUG registers X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org From: Damien Lespiau This reports which lanes are locked. Signed-off-by: Damien Lespiau --- lib/intel_reg.h | 8 ++++++++ tools/intel_reg_dumper.c | 21 +++++++++++++++++++++ 2 files changed, 29 insertions(+) diff --git a/lib/intel_reg.h b/lib/intel_reg.h index ffded64..0796cb5 100644 --- a/lib/intel_reg.h +++ b/lib/intel_reg.h @@ -3381,6 +3381,14 @@ typedef enum { #define FDI_RXC_TUSIZE1 0xf2030 #define FDI_RXC_TUSIZE2 0xf2038 +#define FDI_RXA_DEBUG 0xf0020 +#define FDI_RXB_DEBUG 0xf1020 +#define FDI_RXC_DEBUG 0xf2020 +#define FDI_RX_DEBUG_L3_BIT_LOCKED (1<<29) +#define FDI_RX_DEBUG_L2_BIT_LOCKED (1<<28) +#define FDI_RX_DEBUG_L1_BIT_LOCKED (1<<27) +#define FDI_RX_DEBUG_L0_BIT_LOCKED (1<<26) + /* FDI_RX interrupt register format */ #define FDI_RX_INTER_LANE_ALIGN (1<<10) #define FDI_RX_SYMBOL_LOCK (1<<9) /* train 2 */ diff --git a/tools/intel_reg_dumper.c b/tools/intel_reg_dumper.c index f6392e2..7f6eaaa 100644 --- a/tools/intel_reg_dumper.c +++ b/tools/intel_reg_dumper.c @@ -1310,6 +1310,23 @@ DEBUGSTRING(ironlake_debug_fdi_rx_misc) snprintf(result, len, "FDI Delay %d", val & ((1 << 13) - 1)); } +DEBUGSTRING(ironlake_debug_fdi_rx_debug) +{ + int l0_locked = val & FDI_RX_DEBUG_L0_BIT_LOCKED; + int l1_locked = val & FDI_RX_DEBUG_L1_BIT_LOCKED; + int l2_locked = val & FDI_RX_DEBUG_L2_BIT_LOCKED; + int l3_locked = val & FDI_RX_DEBUG_L3_BIT_LOCKED; + const char *none = ""; + + if (l0_locked + l1_locked + l2_locked + l3_locked == 0) + none = "none"; + + snprintf(result, len, "bit locked lanes: %s%s%s%s%s", + l0_locked ? "0 " : "", l1_locked ? "1 " : "", + l2_locked ? "2 " : "", l3_locked ? "3 " : "", + none); +} + DEBUGSTRING(ironlake_debug_transconf) { const char *enable = val & TRANS_ENABLE ? "enable" : "disable"; @@ -1793,6 +1810,10 @@ static struct reg_debug ironlake_debug_regs[] = { DEFINEREG(FDI_RXB_IIR), DEFINEREG(FDI_RXB_IMR), + DEFINEREG2(FDI_RXA_DEBUG, ironlake_debug_fdi_rx_debug), + DEFINEREG2(FDI_RXB_DEBUG, ironlake_debug_fdi_rx_debug), + DEFINEREG2(FDI_RXC_DEBUG, ironlake_debug_fdi_rx_debug), + DEFINEREG2(PCH_ADPA, i830_debug_adpa), DEFINEREG2(HDMIB, ironlake_debug_hdmi), DEFINEREG2(HDMIC, ironlake_debug_hdmi),