From patchwork Thu Aug 30 11:26:48 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 1387391 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id 7AB12DF264 for ; Thu, 30 Aug 2012 11:27:13 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 56A24A02FA for ; Thu, 30 Aug 2012 04:27:13 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-bk0-f49.google.com (mail-bk0-f49.google.com [209.85.214.49]) by gabe.freedesktop.org (Postfix) with ESMTP id 7403E9E730 for ; Thu, 30 Aug 2012 04:26:58 -0700 (PDT) Received: by bkcji2 with SMTP id ji2so780603bkc.36 for ; Thu, 30 Aug 2012 04:26:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer; bh=mc4iXnRYaCEWH1/8dzuOIpm7ZwutHhMJsOZ6mUtJGx8=; b=UoWX27P/5XEki8j2MQuWytYJ9k0SGMFmfo2KAzUI+3UaGhgqNUAoFoJQzhJBfZEw3Z D22MqZXafu/6uocG+tvb9I7COpQ77boQHb4ZAoXGRcQAheV7TR6Z8GbLoWgioPp06Di9 jer2iT1x2mIX7XG21jQdWMWwPTnaFgTPQ5pfY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:x-gm-message-state; bh=mc4iXnRYaCEWH1/8dzuOIpm7ZwutHhMJsOZ6mUtJGx8=; b=J7qdcycFoqgSfo2ydaKSlcQfpMpjgcb4rRm1v8dQNxQz4sA604K6qEZI2s2ag1gFGZ WewJAsrjIiLqDTGUsw3kyuQAm+C2hfQSsU5wrxQWvYyYNnz5C6pHXjjhvuHjuwaoDG+T /IMBPfYcBghvCxXaXZpGp+4HQeYR7Dcu1N0l4nKO562hoiJoXRrgcn64GUMMibjTl0hX yaZ7/Uuy43jw1LW0wfnhAANE6D+psiTI4ROYwoB6eZ35dAlNuD7hquaR1Lme+bc+JmII bp7bQne/p+bj7SsOw278O+Tgwxu1ac8iTu0h9qoSwUbF4MWQTPKJ4/O1kgdnbaFC+HPR dCYg== Received: by 10.204.157.6 with SMTP id z6mr2509933bkw.25.1346326016994; Thu, 30 Aug 2012 04:26:56 -0700 (PDT) Received: from aaron.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id c18sm1007540bkv.8.2012.08.30.04.26.54 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 30 Aug 2012 04:26:55 -0700 (PDT) From: Daniel Vetter To: Intel Graphics Development Date: Thu, 30 Aug 2012 13:26:48 +0200 Message-Id: <1346326008-11186-1-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.10.4 X-Gm-Message-State: ALoCoQlalQEaT2QXrYPYFPOjn94OD3jDWV91BGBt7fkwrfK7gxm3BFjMDvp+fFoqq+w3/Dh0soIZ Cc: Daniel Vetter , Arjan van de Ven , DRI Development Subject: [Intel-gfx] [PATCH] drm/i915: add a tracepoint for gpu frequency changes X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org We've had and still have too many issues where the gpu turbot doesn't quite to what it's supposed to do (or what we want it to do). Adding a tracepoint to track when the desired gpu frequence changes should help a lot in characterizing and understanding problematic workloads. Also, this should be fairly interesting for power tuning (and especially noticing when the gpu is stuck in high frequencies, as has happened in the past) and hence for integration into powertop and similar tools. Cc: Arjan van de Ven Signed-off-by: Daniel Vetter Reviewed-by: Chris Wilson Acked-by: Paul Menzel --- drivers/gpu/drm/i915/i915_trace.h | 15 +++++++++++++++ drivers/gpu/drm/i915/intel_pm.c | 2 ++ 2 files changed, 17 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h index 3c4093d..8134421 100644 --- a/drivers/gpu/drm/i915/i915_trace.h +++ b/drivers/gpu/drm/i915/i915_trace.h @@ -430,6 +430,21 @@ TRACE_EVENT(i915_reg_rw, (u32)(__entry->val >> 32)) ); +TRACE_EVENT(intel_gpu_freq_change, + TP_PROTO(u32 freq), + TP_ARGS(freq), + + TP_STRUCT__entry( + __field(u32, freq) + ), + + TP_fast_assign( + __entry->freq = freq; + ), + + TP_printk("new_freq=%u", __entry->freq) +); + #endif /* _I915_TRACE_H_ */ /* This part must be outside protection */ diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index ebe3498..194a72f 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -2343,6 +2343,8 @@ void gen6_set_rps(struct drm_device *dev, u8 val) I915_WRITE(GEN6_RP_INTERRUPT_LIMITS, limits); dev_priv->rps.cur_delay = val; + + trace_intel_gpu_freq_change(val * 50); } static void gen6_disable_rps(struct drm_device *dev)