From patchwork Thu Sep 6 20:15:40 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 1417961 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id 6487FDFFCF for ; Thu, 6 Sep 2012 21:24:21 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5F962A0D97 for ; Thu, 6 Sep 2012 14:24:21 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wg0-f43.google.com (mail-wg0-f43.google.com [74.125.82.43]) by gabe.freedesktop.org (Postfix) with ESMTP id 9962F9E829 for ; Thu, 6 Sep 2012 14:23:07 -0700 (PDT) Received: by wgbdr1 with SMTP id dr1so1452538wgb.12 for ; Thu, 06 Sep 2012 14:23:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=XcZ1sUzjUzPY4Fura7xsznjwPw6f/xv+EJHjUbAHU/g=; b=Rsj6wrKCImfIuyf+ye41ic4rAfpDiNI732lHoE1zuO0rStlY5tTKRKYqb/OADj+uxj 4ZoK/wCyjABRkNyOhi8Wt/u4rF3KmWwM71Jz8q2r6XVWxwvPNPR4k+UEPAMx3KMpOemo vRcuQ4rihxobBYqm44wpZYCd3dYwSqiP8tolI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=XcZ1sUzjUzPY4Fura7xsznjwPw6f/xv+EJHjUbAHU/g=; b=j7j5SkaSX4xoMKDWObwv79aBp3meew2bqASUout+zGCfR+W/Jp11f8WSvpVq17fj31 xa15VdJ6U0i2JWmrlhq+vgEFGZMmlsSwRPPy6hw4ph3A6tLUc40KHpeM9Pp9ES2dAztE dvTmDtvC09u68OFMNA/ge7DdvrzQxfFOjUc9k2/CVHBKg5lCUEKkOVWgmSfzr/IbUAf9 Fnriz/yZk/SKtarbvDGcP9M4fxs0wAGqDA6mXmBS1SgcrD1WJ96w7fETxMmVQMRRelTz sIhQAL724AkBRDxBBRensusKZ0bnF5VQGDy0sBkXLyAXpS3gkz3oAc/xMMA1A/6SZNyh u2WQ== Received: by 10.216.242.204 with SMTP id i54mr1798390wer.94.1346966586763; Thu, 06 Sep 2012 14:23:06 -0700 (PDT) Received: from wespe.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id l5sm8618787wix.5.2012.09.06.14.23.05 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 06 Sep 2012 14:23:05 -0700 (PDT) From: Daniel Vetter To: Intel Graphics Development Date: Thu, 6 Sep 2012 22:15:40 +0200 Message-Id: <1346962544-7439-2-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.11.2 In-Reply-To: <1346962544-7439-1-git-send-email-daniel.vetter@ffwll.ch> References: <1346962544-7439-1-git-send-email-daniel.vetter@ffwll.ch> X-Gm-Message-State: ALoCoQljjaERt60lqF/tz32dHPmozDPFv4TRvETiUB6GneZ8Zwh2tgshNxWPtpQTVeXzYysZmZzq Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 1/5] drm/i915: add encoder->pre_enable/post_disable X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org The cpu eDP encoder has some horrible hacks to set up the DP pll at the right time. To be able to move them to the right place, add some more encoder callbacks so that this can happen at the right time. LVDS has some similar funky hacks, but that would require more work (we need to move around the pll setup a bit). Hence for now only wire these new callbacks up for ilk+ - we only have cpu eDP on these platforms. Signed-Off-by: Daniel Vetter Reviewed-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_display.c | 8 ++++++++ drivers/gpu/drm/i915/intel_drv.h | 2 ++ 2 files changed, 10 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index bff0936..1d31364 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3189,6 +3189,10 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc) assert_fdi_rx_disabled(dev_priv, pipe); } + for_each_encoder_on_crtc(dev, crtc, encoder) + if (encoder->pre_enable) + encoder->pre_enable(encoder); + /* Enable panel fitting for LVDS */ if (dev_priv->pch_pf_size && (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS) || HAS_eDP)) { @@ -3258,6 +3262,10 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc) I915_WRITE(PF_CTL(pipe), 0); I915_WRITE(PF_WIN_SZ(pipe), 0); + for_each_encoder_on_crtc(dev, crtc, encoder) + if (encoder->post_disable) + encoder->post_disable(encoder); + ironlake_fdi_disable(crtc); intel_disable_transcoder(dev_priv, pipe); diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 4f2b2d6..1306f05 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -153,7 +153,9 @@ struct intel_encoder { bool connectors_active; void (*hot_plug)(struct intel_encoder *); void (*enable)(struct intel_encoder *); + void (*pre_enable)(struct intel_encoder *); void (*disable)(struct intel_encoder *); + void (*post_disable)(struct intel_encoder *); /* Read out the current hw state of this connector, returning true if * the encoder is active. If the encoder is enabled it also set the pipe * it is connected to in the pipe parameter. */