From patchwork Sun Sep 9 09:00:45 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 1427661 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id 8ADC7DF264 for ; Sun, 9 Sep 2012 10:12:13 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 87C419F51B for ; Sun, 9 Sep 2012 03:12:13 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wi0-f171.google.com (mail-wi0-f171.google.com [209.85.212.171]) by gabe.freedesktop.org (Postfix) with ESMTP id DBE579F611 for ; Sun, 9 Sep 2012 03:08:20 -0700 (PDT) Received: by wibhq4 with SMTP id hq4so887443wib.12 for ; Sun, 09 Sep 2012 03:08:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=WAaBb3wDIAIZ79IRud2JT7MUuKDcdsRGn/nKGrP7IjA=; b=hKVRj9rHp3NjqU4NbqJsSFXxlvXML6IskTxcM6fhzwpBaZSyCfM0bd76FV4iR+B5VK ZKQjgc9mdzob+7yzuQKbNy7dxsb8ifJm/aYQNm0HBrrfEkSG+/4WdpkX15w4A0uESBLI ulWDNsC+/zySq9ymA9X1n8iATp2zPfAEkUbKc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=WAaBb3wDIAIZ79IRud2JT7MUuKDcdsRGn/nKGrP7IjA=; b=Z2ncZifBaC7Aukohy93XCnTWQVKGT9st/ZopD7WbKDmWU/UddWaRXyaNvarSvOV7Ak mCbp42JVDxoP21XUVvYBqT8YlIyfUGvyt14dyuuloKFRiJyWzEYVIgKxWnYZo5NHPktY Jvi4TXlPaMx3F8Qzjik5JnFfk/h0lZ+/janNjFy2/cilPPmdatPvNiIPJ/xMFqH7yAny PJ6LSxH0Ot7EMGTinDXxntoolzf4Q2DvrWsplpAZBL2lD/iK4OmwhN8SsL47o55oy6mL +5XHvFfq3rfOBerxwI/ybdr6Jrc4urjwpXymjPeFLB79HTyiNQadNgUU2WhSqzJ7xQnt 4+iQ== Received: by 10.180.82.39 with SMTP id f7mr9711436wiy.2.1347185299941; Sun, 09 Sep 2012 03:08:19 -0700 (PDT) Received: from wespe.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id o2sm15381282wiz.11.2012.09.09.03.08.18 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 09 Sep 2012 03:08:19 -0700 (PDT) From: Daniel Vetter To: Intel Graphics Development Date: Sun, 9 Sep 2012 11:00:45 +0200 Message-Id: <1347181247-2484-6-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.11.2 In-Reply-To: <1347181247-2484-1-git-send-email-daniel.vetter@ffwll.ch> References: <1347181247-2484-1-git-send-email-daniel.vetter@ffwll.ch> X-Gm-Message-State: ALoCoQnCxpOPYVgWMH3cicnBZePf6lOMozmdcnafKZqayXPpOkzS/02335OOJEXs7W/mzdCaOCXg Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 6/8] drm/i915: only read SDE_IIR when required on ilk/snb X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org The same optimization has already been applied to the ivb irq handler in commit 0e43406bcc1868a316eea6012a0a09d992c53521 Author: Chris Wilson Date: Wed May 9 21:45:44 2012 +0100 drm/i915: Simplify interrupt processing for IvyBridge Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/i915_irq.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 1741f2e..f836e89 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -754,7 +754,7 @@ static irqreturn_t ironlake_irq_handler(DRM_IRQ_ARGS) struct drm_device *dev = (struct drm_device *) arg; drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; int ret = IRQ_NONE; - u32 de_iir, gt_iir, de_ier, pch_iir, pm_iir; + u32 de_iir, gt_iir, de_ier, pm_iir; u32 hotplug_mask; atomic_inc(&dev_priv->irq_received); @@ -766,11 +766,9 @@ static irqreturn_t ironlake_irq_handler(DRM_IRQ_ARGS) de_iir = I915_READ(DEIIR); gt_iir = I915_READ(GTIIR); - pch_iir = I915_READ(SDEIIR); pm_iir = I915_READ(GEN6_PMIIR); - if (de_iir == 0 && gt_iir == 0 && pch_iir == 0 && - (!IS_GEN6(dev) || pm_iir == 0)) + if (de_iir == 0 && gt_iir == 0 && (!IS_GEN6(dev) || pm_iir == 0)) goto done; if (HAS_PCH_CPT(dev)) @@ -806,12 +804,17 @@ static irqreturn_t ironlake_irq_handler(DRM_IRQ_ARGS) /* check event from PCH */ if (de_iir & DE_PCH_EVENT) { + u32 pch_iir = I915_READ(SDEIIR); + if (pch_iir & hotplug_mask) queue_work(dev_priv->wq, &dev_priv->hotplug_work); if (HAS_PCH_CPT(dev)) cpt_irq_handler(dev, pch_iir); else ibx_irq_handler(dev, pch_iir); + + /* should clear PCH hotplug event before clear CPU irq */ + I915_WRITE(SDEIIR, pch_iir); } if (IS_GEN5(dev) && de_iir & DE_PCU_EVENT) @@ -820,8 +823,6 @@ static irqreturn_t ironlake_irq_handler(DRM_IRQ_ARGS) if (IS_GEN6(dev) && pm_iir & GEN6_PM_DEFERRED_EVENTS) gen6_queue_rps_work(dev_priv, pm_iir); - /* should clear PCH hotplug event before clear CPU irq */ - I915_WRITE(SDEIIR, pch_iir); I915_WRITE(GTIIR, gt_iir); I915_WRITE(DEIIR, de_iir); I915_WRITE(GEN6_PMIIR, pm_iir);