| Message ID | 1347184456-15042-1-git-send-email-daniel.vetter@ffwll.ch (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Sun, 9 Sep 2012 11:54:16 +0200, Daniel Vetter <daniel.vetter@ffwll.ch> wrote: > Currently we've only frobbed this bit at irq_init time, but did > not restore it at resume time. Move it to the gen3 clock gating > function to fix this. > > Notice while reading through code. > > Cc: stable@vger.kernel.org (for 3.5 only) > Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> -Chris
On Sun, Sep 09, 2012 at 12:23:05PM +0100, Chris Wilson wrote: > On Sun, 9 Sep 2012 11:54:16 +0200, Daniel Vetter <daniel.vetter@ffwll.ch> wrote: > > Currently we've only frobbed this bit at irq_init time, but did > > not restore it at resume time. Move it to the gen3 clock gating > > function to fix this. > > > > Notice while reading through code. > > > > Cc: stable@vger.kernel.org (for 3.5 only) > > Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> > Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Picked up for -fixes, thanks for the review. -Daniel
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index bcb2624..71688fc 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -2774,9 +2774,6 @@ void intel_irq_init(struct drm_device *dev) dev->driver->irq_handler = i8xx_irq_handler; dev->driver->irq_uninstall = i8xx_irq_uninstall; } else if (INTEL_INFO(dev)->gen == 3) { - /* IIR "flip pending" means done if this bit is set */ - I915_WRITE(ECOSKPD, _MASKED_BIT_DISABLE(ECO_FLIP_DONE)); - dev->driver->irq_preinstall = i915_irq_preinstall; dev->driver->irq_postinstall = i915_irq_postinstall; dev->driver->irq_uninstall = i915_irq_uninstall; diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 36c6409..99ef6d2 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -3723,6 +3723,9 @@ static void gen3_init_clock_gating(struct drm_device *dev) if (IS_PINEVIEW(dev)) I915_WRITE(ECOSKPD, _MASKED_BIT_ENABLE(ECO_GATING_CX_ONLY)); + + /* IIR "flip pending" means done if this bit is set */ + I915_WRITE(ECOSKPD, _MASKED_BIT_DISABLE(ECO_FLIP_DONE)); } static void i85x_init_clock_gating(struct drm_device *dev)
Currently we've only frobbed this bit at irq_init time, but did not restore it at resume time. Move it to the gen3 clock gating function to fix this. Notice while reading through code. Cc: stable@vger.kernel.org (for 3.5 only) Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> --- drivers/gpu/drm/i915/i915_irq.c | 3 --- drivers/gpu/drm/i915/intel_pm.c | 3 +++ 2 files changed, 3 insertions(+), 3 deletions(-)