| Message ID | 1347927015-15553-1-git-send-email-ben@bwidawsk.net (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Feel free to use: Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> On Mon, Sep 17, 2012 at 9:10 PM, Ben Widawsky <ben@bwidawsk.net> wrote: > I do not currently have a VLV to test this on, but hopefully it only > removes information from debugfs, sysfs, and prevents enabling an > unsupported mode. > > CC: Jesse Barnes <jbarnes@virtuousgeek.org> > Signed-off-by: Ben Widawsky <ben@bwidawsk.net> > --- > drivers/gpu/drm/i915/i915_debugfs.c | 5 +++++ > drivers/gpu/drm/i915/i915_sysfs.c | 3 +++ > drivers/gpu/drm/i915/intel_pm.c | 4 ++-- > 3 files changed, 10 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c > index 7a4b3f3..4e74a6a 100644 > --- a/drivers/gpu/drm/i915/i915_debugfs.c > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > @@ -1144,11 +1144,16 @@ static int gen6_drpc_info(struct seq_file *m) > I915_READ(GEN6_GT_GFX_RC6_LOCKED)); > seq_printf(m, "RC6 residency since boot: %u\n", > I915_READ(GEN6_GT_GFX_RC6)); > + > + if (IS_VALLEYVIEW(dev)) > + goto out; > + > seq_printf(m, "RC6+ residency since boot: %u\n", > I915_READ(GEN6_GT_GFX_RC6p)); > seq_printf(m, "RC6++ residency since boot: %u\n", > I915_READ(GEN6_GT_GFX_RC6pp)); > > +out: > return 0; > } > > diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c > index a253515..4717a42 100644 > --- a/drivers/gpu/drm/i915/i915_sysfs.c > +++ b/drivers/gpu/drm/i915/i915_sysfs.c > @@ -41,6 +41,9 @@ static u32 calc_residency(struct drm_device *dev, const u32 reg) > if (!intel_enable_rc6(dev)) > return 0; > > + if (IS_VALLEYVIEW(dev) && reg != GEN6_GT_GFX_RC6) > + return 0; > + > raw_time = I915_READ(reg) * 128ULL; > return DIV_ROUND_UP_ULL(raw_time, 100000); > } > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 82ca172..ccd50d7 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -2389,8 +2389,8 @@ int intel_enable_rc6(const struct drm_device *dev) > } > > /* snb/ivb have more than one rc6 state. */ > - if (INTEL_INFO(dev)->gen == 6) { > - DRM_DEBUG_DRIVER("Sandybridge: deep RC6 disabled\n"); > + if (INTEL_INFO(dev)->gen == 6 || IS_VALLEYVIEW(dev)) { > + DRM_DEBUG_DRIVER("HW doesn't support deep RC6 (disabling)\n"); > return INTEL_RC6_ENABLE; > } > > -- > 1.7.12 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
On Mon, Sep 17, 2012 at 05:10:15PM -0700, Ben Widawsky wrote: > I do not currently have a VLV to test this on, but hopefully it only > removes information from debugfs, sysfs, and prevents enabling an > unsupported mode. > > CC: Jesse Barnes <jbarnes@virtuousgeek.org> > Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Haswell seems to have a similar issue ... -Daniel > --- > drivers/gpu/drm/i915/i915_debugfs.c | 5 +++++ > drivers/gpu/drm/i915/i915_sysfs.c | 3 +++ > drivers/gpu/drm/i915/intel_pm.c | 4 ++-- > 3 files changed, 10 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c > index 7a4b3f3..4e74a6a 100644 > --- a/drivers/gpu/drm/i915/i915_debugfs.c > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > @@ -1144,11 +1144,16 @@ static int gen6_drpc_info(struct seq_file *m) > I915_READ(GEN6_GT_GFX_RC6_LOCKED)); > seq_printf(m, "RC6 residency since boot: %u\n", > I915_READ(GEN6_GT_GFX_RC6)); > + > + if (IS_VALLEYVIEW(dev)) > + goto out; > + > seq_printf(m, "RC6+ residency since boot: %u\n", > I915_READ(GEN6_GT_GFX_RC6p)); > seq_printf(m, "RC6++ residency since boot: %u\n", > I915_READ(GEN6_GT_GFX_RC6pp)); > > +out: > return 0; > } > > diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c > index a253515..4717a42 100644 > --- a/drivers/gpu/drm/i915/i915_sysfs.c > +++ b/drivers/gpu/drm/i915/i915_sysfs.c > @@ -41,6 +41,9 @@ static u32 calc_residency(struct drm_device *dev, const u32 reg) > if (!intel_enable_rc6(dev)) > return 0; > > + if (IS_VALLEYVIEW(dev) && reg != GEN6_GT_GFX_RC6) > + return 0; > + > raw_time = I915_READ(reg) * 128ULL; > return DIV_ROUND_UP_ULL(raw_time, 100000); > } > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 82ca172..ccd50d7 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -2389,8 +2389,8 @@ int intel_enable_rc6(const struct drm_device *dev) > } > > /* snb/ivb have more than one rc6 state. */ > - if (INTEL_INFO(dev)->gen == 6) { > - DRM_DEBUG_DRIVER("Sandybridge: deep RC6 disabled\n"); > + if (INTEL_INFO(dev)->gen == 6 || IS_VALLEYVIEW(dev)) { > + DRM_DEBUG_DRIVER("HW doesn't support deep RC6 (disabling)\n"); > return INTEL_RC6_ENABLE; > } > > -- > 1.7.12 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
On Wed, 26 Sep 2012 14:06:36 +0200 Daniel Vetter <daniel@ffwll.ch> wrote: > On Mon, Sep 17, 2012 at 05:10:15PM -0700, Ben Widawsky wrote: > > I do not currently have a VLV to test this on, but hopefully it only > > removes information from debugfs, sysfs, and prevents enabling an > > unsupported mode. > > > > CC: Jesse Barnes <jbarnes@virtuousgeek.org> > > Signed-off-by: Ben Widawsky <ben@bwidawsk.net> > > Haswell seems to have a similar issue ... > -Daniel I've not found such information. Can you tell me where you see that?
On Thu, Sep 27, 2012 at 5:34 PM, Ben Widawsky <ben@bwidawsk.net> wrote: > On Wed, 26 Sep 2012 14:06:36 +0200 > Daniel Vetter <daniel@ffwll.ch> wrote: > >> On Mon, Sep 17, 2012 at 05:10:15PM -0700, Ben Widawsky wrote: >> > I do not currently have a VLV to test this on, but hopefully it only >> > removes information from debugfs, sysfs, and prevents enabling an >> > unsupported mode. >> > >> > CC: Jesse Barnes <jbarnes@virtuousgeek.org> >> > Signed-off-by: Ben Widawsky <ben@bwidawsk.net> >> >> Haswell seems to have a similar issue ... >> -Daniel > > I've not found such information. Can you tell me where you see that? Haswell doesn't have the additional rc6 levels either, but on a quick look through the code we still expose them, like on vlv. -Daniel
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 7a4b3f3..4e74a6a 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -1144,11 +1144,16 @@ static int gen6_drpc_info(struct seq_file *m) I915_READ(GEN6_GT_GFX_RC6_LOCKED)); seq_printf(m, "RC6 residency since boot: %u\n", I915_READ(GEN6_GT_GFX_RC6)); + + if (IS_VALLEYVIEW(dev)) + goto out; + seq_printf(m, "RC6+ residency since boot: %u\n", I915_READ(GEN6_GT_GFX_RC6p)); seq_printf(m, "RC6++ residency since boot: %u\n", I915_READ(GEN6_GT_GFX_RC6pp)); +out: return 0; } diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c index a253515..4717a42 100644 --- a/drivers/gpu/drm/i915/i915_sysfs.c +++ b/drivers/gpu/drm/i915/i915_sysfs.c @@ -41,6 +41,9 @@ static u32 calc_residency(struct drm_device *dev, const u32 reg) if (!intel_enable_rc6(dev)) return 0; + if (IS_VALLEYVIEW(dev) && reg != GEN6_GT_GFX_RC6) + return 0; + raw_time = I915_READ(reg) * 128ULL; return DIV_ROUND_UP_ULL(raw_time, 100000); } diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 82ca172..ccd50d7 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -2389,8 +2389,8 @@ int intel_enable_rc6(const struct drm_device *dev) } /* snb/ivb have more than one rc6 state. */ - if (INTEL_INFO(dev)->gen == 6) { - DRM_DEBUG_DRIVER("Sandybridge: deep RC6 disabled\n"); + if (INTEL_INFO(dev)->gen == 6 || IS_VALLEYVIEW(dev)) { + DRM_DEBUG_DRIVER("HW doesn't support deep RC6 (disabling)\n"); return INTEL_RC6_ENABLE; }
I do not currently have a VLV to test this on, but hopefully it only removes information from debugfs, sysfs, and prevents enabling an unsupported mode. CC: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Ben Widawsky <ben@bwidawsk.net> --- drivers/gpu/drm/i915/i915_debugfs.c | 5 +++++ drivers/gpu/drm/i915/i915_sysfs.c | 3 +++ drivers/gpu/drm/i915/intel_pm.c | 4 ++-- 3 files changed, 10 insertions(+), 2 deletions(-)