diff mbox

[1/2] drm/i915: s/cacheing/caching/

Message ID 1348272081-5357-1-git-send-email-ben@bwidawsk.net (mailing list archive)
State New, archived
Headers show

Commit Message

Ben Widawsky Sept. 22, 2012, 12:01 a.m. UTC
From: Ben Widawsky <benjamin.widawsky@intel.com>

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
 drivers/gpu/drm/i915/i915_dma.c |  4 ++--
 drivers/gpu/drm/i915/i915_drv.h |  8 ++++----
 drivers/gpu/drm/i915/i915_gem.c | 20 ++++++++++----------
 include/drm/i915_drm.h          | 20 ++++++++++----------
 4 files changed, 26 insertions(+), 26 deletions(-)

Comments

Rodrigo Vivi Sept. 24, 2012, 10:22 p.m. UTC | #1
Feel free to use:
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>

On Fri, Sep 21, 2012 at 9:01 PM, Ben Widawsky <ben@bwidawsk.net> wrote:
> From: Ben Widawsky <benjamin.widawsky@intel.com>
>
> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
> ---
>  drivers/gpu/drm/i915/i915_dma.c |  4 ++--
>  drivers/gpu/drm/i915/i915_drv.h |  8 ++++----
>  drivers/gpu/drm/i915/i915_gem.c | 20 ++++++++++----------
>  include/drm/i915_drm.h          | 20 ++++++++++----------
>  4 files changed, 26 insertions(+), 26 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
> index 2cbaec5..e7c95da 100644
> --- a/drivers/gpu/drm/i915/i915_dma.c
> +++ b/drivers/gpu/drm/i915/i915_dma.c
> @@ -1860,8 +1860,8 @@ struct drm_ioctl_desc i915_ioctls[] = {
>         DRM_IOCTL_DEF_DRV(I915_GEM_PIN, i915_gem_pin_ioctl, DRM_AUTH|DRM_ROOT_ONLY|DRM_UNLOCKED),
>         DRM_IOCTL_DEF_DRV(I915_GEM_UNPIN, i915_gem_unpin_ioctl, DRM_AUTH|DRM_ROOT_ONLY|DRM_UNLOCKED),
>         DRM_IOCTL_DEF_DRV(I915_GEM_BUSY, i915_gem_busy_ioctl, DRM_AUTH|DRM_UNLOCKED),
> -       DRM_IOCTL_DEF_DRV(I915_GEM_SET_CACHEING, i915_gem_set_cacheing_ioctl, DRM_UNLOCKED),
> -       DRM_IOCTL_DEF_DRV(I915_GEM_GET_CACHEING, i915_gem_get_cacheing_ioctl, DRM_UNLOCKED),
> +       DRM_IOCTL_DEF_DRV(I915_GEM_SET_CACHING, i915_gem_set_caching_ioctl, DRM_UNLOCKED),
> +       DRM_IOCTL_DEF_DRV(I915_GEM_GET_CACHING, i915_gem_get_caching_ioctl, DRM_UNLOCKED),
>         DRM_IOCTL_DEF_DRV(I915_GEM_THROTTLE, i915_gem_throttle_ioctl, DRM_AUTH|DRM_UNLOCKED),
>         DRM_IOCTL_DEF_DRV(I915_GEM_ENTERVT, i915_gem_entervt_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED),
>         DRM_IOCTL_DEF_DRV(I915_GEM_LEAVEVT, i915_gem_leavevt_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED),
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index d3b4261..84bf823 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1285,10 +1285,10 @@ int i915_gem_unpin_ioctl(struct drm_device *dev, void *data,
>                          struct drm_file *file_priv);
>  int i915_gem_busy_ioctl(struct drm_device *dev, void *data,
>                         struct drm_file *file_priv);
> -int i915_gem_get_cacheing_ioctl(struct drm_device *dev, void *data,
> -                               struct drm_file *file);
> -int i915_gem_set_cacheing_ioctl(struct drm_device *dev, void *data,
> -                               struct drm_file *file);
> +int i915_gem_get_caching_ioctl(struct drm_device *dev, void *data,
> +                              struct drm_file *file);
> +int i915_gem_set_caching_ioctl(struct drm_device *dev, void *data,
> +                              struct drm_file *file);
>  int i915_gem_throttle_ioctl(struct drm_device *dev, void *data,
>                             struct drm_file *file_priv);
>  int i915_gem_madvise_ioctl(struct drm_device *dev, void *data,
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index f5ffed1..fa25b85 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -3015,10 +3015,10 @@ int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj,
>         return 0;
>  }
>
> -int i915_gem_get_cacheing_ioctl(struct drm_device *dev, void *data,
> -                               struct drm_file *file)
> +int i915_gem_get_caching_ioctl(struct drm_device *dev, void *data,
> +                              struct drm_file *file)
>  {
> -       struct drm_i915_gem_cacheing *args = data;
> +       struct drm_i915_gem_caching *args = data;
>         struct drm_i915_gem_object *obj;
>         int ret;
>
> @@ -3032,7 +3032,7 @@ int i915_gem_get_cacheing_ioctl(struct drm_device *dev, void *data,
>                 goto unlock;
>         }
>
> -       args->cacheing = obj->cache_level != I915_CACHE_NONE;
> +       args->caching = obj->cache_level != I915_CACHE_NONE;
>
>         drm_gem_object_unreference(&obj->base);
>  unlock:
> @@ -3040,10 +3040,10 @@ unlock:
>         return ret;
>  }
>
> -int i915_gem_set_cacheing_ioctl(struct drm_device *dev, void *data,
> -                               struct drm_file *file)
> +int i915_gem_set_caching_ioctl(struct drm_device *dev, void *data,
> +                              struct drm_file *file)
>  {
> -       struct drm_i915_gem_cacheing *args = data;
> +       struct drm_i915_gem_caching *args = data;
>         struct drm_i915_gem_object *obj;
>         enum i915_cache_level level;
>         int ret;
> @@ -3052,11 +3052,11 @@ int i915_gem_set_cacheing_ioctl(struct drm_device *dev, void *data,
>         if (ret)
>                 return ret;
>
> -       switch (args->cacheing) {
> -       case I915_CACHEING_NONE:
> +       switch (args->caching) {
> +       case I915_CACHING_NONE:
>                 level = I915_CACHE_NONE;
>                 break;
> -       case I915_CACHEING_CACHED:
> +       case I915_CACHING_CACHED:
>                 level = I915_CACHE_LLC;
>                 break;
>         default:
> diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
> index 4515330..b98589d 100644
> --- a/include/drm/i915_drm.h
> +++ b/include/drm/i915_drm.h
> @@ -203,8 +203,8 @@ typedef struct _drm_i915_sarea {
>  #define DRM_I915_GEM_WAIT      0x2c
>  #define DRM_I915_GEM_CONTEXT_CREATE    0x2d
>  #define DRM_I915_GEM_CONTEXT_DESTROY   0x2e
> -#define DRM_I915_GEM_SET_CACHEING      0x2f
> -#define DRM_I915_GEM_GET_CACHEING      0x30
> +#define DRM_I915_GEM_SET_CACHING       0x2f
> +#define DRM_I915_GEM_GET_CACHING       0x30
>  #define DRM_I915_REG_READ              0x31
>
>  #define DRM_IOCTL_I915_INIT            DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t)
> @@ -230,8 +230,8 @@ typedef struct _drm_i915_sarea {
>  #define DRM_IOCTL_I915_GEM_PIN         DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_PIN, struct drm_i915_gem_pin)
>  #define DRM_IOCTL_I915_GEM_UNPIN       DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_UNPIN, struct drm_i915_gem_unpin)
>  #define DRM_IOCTL_I915_GEM_BUSY                DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_BUSY, struct drm_i915_gem_busy)
> -#define DRM_IOCTL_I915_GEM_SET_CACHEING                DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_SET_CACHEING, struct drm_i915_gem_cacheing)
> -#define DRM_IOCTL_I915_GEM_GET_CACHEING                DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_GET_CACHEING, struct drm_i915_gem_cacheing)
> +#define DRM_IOCTL_I915_GEM_SET_CACHING         DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_SET_CACHING, struct drm_i915_gem_caching)
> +#define DRM_IOCTL_I915_GEM_GET_CACHING         DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_GET_CACHING, struct drm_i915_gem_caching)
>  #define DRM_IOCTL_I915_GEM_THROTTLE    DRM_IO ( DRM_COMMAND_BASE + DRM_I915_GEM_THROTTLE)
>  #define DRM_IOCTL_I915_GEM_ENTERVT     DRM_IO(DRM_COMMAND_BASE + DRM_I915_GEM_ENTERVT)
>  #define DRM_IOCTL_I915_GEM_LEAVEVT     DRM_IO(DRM_COMMAND_BASE + DRM_I915_GEM_LEAVEVT)
> @@ -716,21 +716,21 @@ struct drm_i915_gem_busy {
>         __u32 busy;
>  };
>
> -#define I915_CACHEING_NONE             0
> -#define I915_CACHEING_CACHED           1
> +#define I915_CACHING_NONE              0
> +#define I915_CACHING_CACHED            1
>
> -struct drm_i915_gem_cacheing {
> +struct drm_i915_gem_caching {
>         /**
> -        * Handle of the buffer to set/get the cacheing level of. */
> +        * Handle of the buffer to set/get the caching level of. */
>         __u32 handle;
>
>         /**
>          * Cacheing level to apply or return value
>          *
> -        * bits0-15 are for generic cacheing control (i.e. the above defined
> +        * bits0-15 are for generic caching control (i.e. the above defined
>          * values). bits16-31 are reserved for platform-specific variations
>          * (e.g. l3$ caching on gen7). */
> -       __u32 cacheing;
> +       __u32 caching;
>  };
>
>  #define I915_TILING_NONE       0
> --
> 1.7.12
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Daniel Vetter Sept. 25, 2012, 8:32 a.m. UTC | #2
On Sat, Sep 22, 2012 at 2:01 AM, Ben Widawsky <ben@bwidawsk.net> wrote:
> From: Ben Widawsky <benjamin.widawsky@intel.com>
>
> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

IIrc we're already including this header in shipping libdrm, and we
have already users for it ... Have you checked whether this doesn't
break anything once copied over to libdrm? Maybe we just need a few
#defines for the old names ...
-Daniel

> ---
>  drivers/gpu/drm/i915/i915_dma.c |  4 ++--
>  drivers/gpu/drm/i915/i915_drv.h |  8 ++++----
>  drivers/gpu/drm/i915/i915_gem.c | 20 ++++++++++----------
>  include/drm/i915_drm.h          | 20 ++++++++++----------
>  4 files changed, 26 insertions(+), 26 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
> index 2cbaec5..e7c95da 100644
> --- a/drivers/gpu/drm/i915/i915_dma.c
> +++ b/drivers/gpu/drm/i915/i915_dma.c
> @@ -1860,8 +1860,8 @@ struct drm_ioctl_desc i915_ioctls[] = {
>         DRM_IOCTL_DEF_DRV(I915_GEM_PIN, i915_gem_pin_ioctl, DRM_AUTH|DRM_ROOT_ONLY|DRM_UNLOCKED),
>         DRM_IOCTL_DEF_DRV(I915_GEM_UNPIN, i915_gem_unpin_ioctl, DRM_AUTH|DRM_ROOT_ONLY|DRM_UNLOCKED),
>         DRM_IOCTL_DEF_DRV(I915_GEM_BUSY, i915_gem_busy_ioctl, DRM_AUTH|DRM_UNLOCKED),
> -       DRM_IOCTL_DEF_DRV(I915_GEM_SET_CACHEING, i915_gem_set_cacheing_ioctl, DRM_UNLOCKED),
> -       DRM_IOCTL_DEF_DRV(I915_GEM_GET_CACHEING, i915_gem_get_cacheing_ioctl, DRM_UNLOCKED),
> +       DRM_IOCTL_DEF_DRV(I915_GEM_SET_CACHING, i915_gem_set_caching_ioctl, DRM_UNLOCKED),
> +       DRM_IOCTL_DEF_DRV(I915_GEM_GET_CACHING, i915_gem_get_caching_ioctl, DRM_UNLOCKED),
>         DRM_IOCTL_DEF_DRV(I915_GEM_THROTTLE, i915_gem_throttle_ioctl, DRM_AUTH|DRM_UNLOCKED),
>         DRM_IOCTL_DEF_DRV(I915_GEM_ENTERVT, i915_gem_entervt_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED),
>         DRM_IOCTL_DEF_DRV(I915_GEM_LEAVEVT, i915_gem_leavevt_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED),
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index d3b4261..84bf823 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1285,10 +1285,10 @@ int i915_gem_unpin_ioctl(struct drm_device *dev, void *data,
>                          struct drm_file *file_priv);
>  int i915_gem_busy_ioctl(struct drm_device *dev, void *data,
>                         struct drm_file *file_priv);
> -int i915_gem_get_cacheing_ioctl(struct drm_device *dev, void *data,
> -                               struct drm_file *file);
> -int i915_gem_set_cacheing_ioctl(struct drm_device *dev, void *data,
> -                               struct drm_file *file);
> +int i915_gem_get_caching_ioctl(struct drm_device *dev, void *data,
> +                              struct drm_file *file);
> +int i915_gem_set_caching_ioctl(struct drm_device *dev, void *data,
> +                              struct drm_file *file);
>  int i915_gem_throttle_ioctl(struct drm_device *dev, void *data,
>                             struct drm_file *file_priv);
>  int i915_gem_madvise_ioctl(struct drm_device *dev, void *data,
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index f5ffed1..fa25b85 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -3015,10 +3015,10 @@ int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj,
>         return 0;
>  }
>
> -int i915_gem_get_cacheing_ioctl(struct drm_device *dev, void *data,
> -                               struct drm_file *file)
> +int i915_gem_get_caching_ioctl(struct drm_device *dev, void *data,
> +                              struct drm_file *file)
>  {
> -       struct drm_i915_gem_cacheing *args = data;
> +       struct drm_i915_gem_caching *args = data;
>         struct drm_i915_gem_object *obj;
>         int ret;
>
> @@ -3032,7 +3032,7 @@ int i915_gem_get_cacheing_ioctl(struct drm_device *dev, void *data,
>                 goto unlock;
>         }
>
> -       args->cacheing = obj->cache_level != I915_CACHE_NONE;
> +       args->caching = obj->cache_level != I915_CACHE_NONE;
>
>         drm_gem_object_unreference(&obj->base);
>  unlock:
> @@ -3040,10 +3040,10 @@ unlock:
>         return ret;
>  }
>
> -int i915_gem_set_cacheing_ioctl(struct drm_device *dev, void *data,
> -                               struct drm_file *file)
> +int i915_gem_set_caching_ioctl(struct drm_device *dev, void *data,
> +                              struct drm_file *file)
>  {
> -       struct drm_i915_gem_cacheing *args = data;
> +       struct drm_i915_gem_caching *args = data;
>         struct drm_i915_gem_object *obj;
>         enum i915_cache_level level;
>         int ret;
> @@ -3052,11 +3052,11 @@ int i915_gem_set_cacheing_ioctl(struct drm_device *dev, void *data,
>         if (ret)
>                 return ret;
>
> -       switch (args->cacheing) {
> -       case I915_CACHEING_NONE:
> +       switch (args->caching) {
> +       case I915_CACHING_NONE:
>                 level = I915_CACHE_NONE;
>                 break;
> -       case I915_CACHEING_CACHED:
> +       case I915_CACHING_CACHED:
>                 level = I915_CACHE_LLC;
>                 break;
>         default:
> diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
> index 4515330..b98589d 100644
> --- a/include/drm/i915_drm.h
> +++ b/include/drm/i915_drm.h
> @@ -203,8 +203,8 @@ typedef struct _drm_i915_sarea {
>  #define DRM_I915_GEM_WAIT      0x2c
>  #define DRM_I915_GEM_CONTEXT_CREATE    0x2d
>  #define DRM_I915_GEM_CONTEXT_DESTROY   0x2e
> -#define DRM_I915_GEM_SET_CACHEING      0x2f
> -#define DRM_I915_GEM_GET_CACHEING      0x30
> +#define DRM_I915_GEM_SET_CACHING       0x2f
> +#define DRM_I915_GEM_GET_CACHING       0x30
>  #define DRM_I915_REG_READ              0x31
>
>  #define DRM_IOCTL_I915_INIT            DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t)
> @@ -230,8 +230,8 @@ typedef struct _drm_i915_sarea {
>  #define DRM_IOCTL_I915_GEM_PIN         DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_PIN, struct drm_i915_gem_pin)
>  #define DRM_IOCTL_I915_GEM_UNPIN       DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_UNPIN, struct drm_i915_gem_unpin)
>  #define DRM_IOCTL_I915_GEM_BUSY                DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_BUSY, struct drm_i915_gem_busy)
> -#define DRM_IOCTL_I915_GEM_SET_CACHEING                DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_SET_CACHEING, struct drm_i915_gem_cacheing)
> -#define DRM_IOCTL_I915_GEM_GET_CACHEING                DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_GET_CACHEING, struct drm_i915_gem_cacheing)
> +#define DRM_IOCTL_I915_GEM_SET_CACHING         DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_SET_CACHING, struct drm_i915_gem_caching)
> +#define DRM_IOCTL_I915_GEM_GET_CACHING         DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_GET_CACHING, struct drm_i915_gem_caching)
>  #define DRM_IOCTL_I915_GEM_THROTTLE    DRM_IO ( DRM_COMMAND_BASE + DRM_I915_GEM_THROTTLE)
>  #define DRM_IOCTL_I915_GEM_ENTERVT     DRM_IO(DRM_COMMAND_BASE + DRM_I915_GEM_ENTERVT)
>  #define DRM_IOCTL_I915_GEM_LEAVEVT     DRM_IO(DRM_COMMAND_BASE + DRM_I915_GEM_LEAVEVT)
> @@ -716,21 +716,21 @@ struct drm_i915_gem_busy {
>         __u32 busy;
>  };
>
> -#define I915_CACHEING_NONE             0
> -#define I915_CACHEING_CACHED           1
> +#define I915_CACHING_NONE              0
> +#define I915_CACHING_CACHED            1
>
> -struct drm_i915_gem_cacheing {
> +struct drm_i915_gem_caching {
>         /**
> -        * Handle of the buffer to set/get the cacheing level of. */
> +        * Handle of the buffer to set/get the caching level of. */
>         __u32 handle;
>
>         /**
>          * Cacheing level to apply or return value
>          *
> -        * bits0-15 are for generic cacheing control (i.e. the above defined
> +        * bits0-15 are for generic caching control (i.e. the above defined
>          * values). bits16-31 are reserved for platform-specific variations
>          * (e.g. l3$ caching on gen7). */
> -       __u32 cacheing;
> +       __u32 caching;
>  };
>
>  #define I915_TILING_NONE       0
> --
> 1.7.12
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Chris Wilson Sept. 25, 2012, 9:43 a.m. UTC | #3
On Tue, 25 Sep 2012 10:32:17 +0200, Daniel Vetter <daniel@ffwll.ch> wrote:
> On Sat, Sep 22, 2012 at 2:01 AM, Ben Widawsky <ben@bwidawsk.net> wrote:
> > From: Ben Widawsky <benjamin.widawsky@intel.com>
> >
> > Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
> 
> IIrc we're already including this header in shipping libdrm, and we
> have already users for it ... Have you checked whether this doesn't
> break anything once copied over to libdrm? Maybe we just need a few
> #defines for the old names ...

It doesn't affect the ddx since it is still using its own prototype, and
there has yet to be a patch for Mesa to use this knowledge.
-Chris
Ben Widawsky Sept. 25, 2012, 4:55 p.m. UTC | #4
On Tue, 25 Sep 2012 10:43:55 +0100
Chris Wilson <chris@chris-wilson.co.uk> wrote:

> On Tue, 25 Sep 2012 10:32:17 +0200, Daniel Vetter <daniel@ffwll.ch> wrote:
> > On Sat, Sep 22, 2012 at 2:01 AM, Ben Widawsky <ben@bwidawsk.net> wrote:
> > > From: Ben Widawsky <benjamin.widawsky@intel.com>
> > >
> > > Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
> > 
> > IIrc we're already including this header in shipping libdrm, and we
> > have already users for it ... Have you checked whether this doesn't
> > break anything once copied over to libdrm? Maybe we just need a few
> > #defines for the old names ...
> 
> It doesn't affect the ddx since it is still using its own prototype, and
> there has yet to be a patch for Mesa to use this knowledge.
> -Chris
> 

Quickly!
Daniel Vetter Sept. 26, 2012, 11:49 a.m. UTC | #5
On Tue, Sep 25, 2012 at 09:55:35AM -0700, Ben Widawsky wrote:
> On Tue, 25 Sep 2012 10:43:55 +0100
> Chris Wilson <chris@chris-wilson.co.uk> wrote:
> 
> > On Tue, 25 Sep 2012 10:32:17 +0200, Daniel Vetter <daniel@ffwll.ch> wrote:
> > > On Sat, Sep 22, 2012 at 2:01 AM, Ben Widawsky <ben@bwidawsk.net> wrote:
> > > > From: Ben Widawsky <benjamin.widawsky@intel.com>
> > > >
> > > > Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
> > > 
> > > IIrc we're already including this header in shipping libdrm, and we
> > > have already users for it ... Have you checked whether this doesn't
> > > break anything once copied over to libdrm? Maybe we just need a few
> > > #defines for the old names ...
> > 
> > It doesn't affect the ddx since it is still using its own prototype, and
> > there has yet to be a patch for Mesa to use this knowledge.
> > -Chris
> > 
> 
> Quickly!

Done!

I think I'll punt on the hsw pte stuff a bit, prod me on (internal) irc
for the reasons ... (and to prove me wrong).
-Daniel
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 2cbaec5..e7c95da 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1860,8 +1860,8 @@  struct drm_ioctl_desc i915_ioctls[] = {
 	DRM_IOCTL_DEF_DRV(I915_GEM_PIN, i915_gem_pin_ioctl, DRM_AUTH|DRM_ROOT_ONLY|DRM_UNLOCKED),
 	DRM_IOCTL_DEF_DRV(I915_GEM_UNPIN, i915_gem_unpin_ioctl, DRM_AUTH|DRM_ROOT_ONLY|DRM_UNLOCKED),
 	DRM_IOCTL_DEF_DRV(I915_GEM_BUSY, i915_gem_busy_ioctl, DRM_AUTH|DRM_UNLOCKED),
-	DRM_IOCTL_DEF_DRV(I915_GEM_SET_CACHEING, i915_gem_set_cacheing_ioctl, DRM_UNLOCKED),
-	DRM_IOCTL_DEF_DRV(I915_GEM_GET_CACHEING, i915_gem_get_cacheing_ioctl, DRM_UNLOCKED),
+	DRM_IOCTL_DEF_DRV(I915_GEM_SET_CACHING, i915_gem_set_caching_ioctl, DRM_UNLOCKED),
+	DRM_IOCTL_DEF_DRV(I915_GEM_GET_CACHING, i915_gem_get_caching_ioctl, DRM_UNLOCKED),
 	DRM_IOCTL_DEF_DRV(I915_GEM_THROTTLE, i915_gem_throttle_ioctl, DRM_AUTH|DRM_UNLOCKED),
 	DRM_IOCTL_DEF_DRV(I915_GEM_ENTERVT, i915_gem_entervt_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED),
 	DRM_IOCTL_DEF_DRV(I915_GEM_LEAVEVT, i915_gem_leavevt_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED),
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index d3b4261..84bf823 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1285,10 +1285,10 @@  int i915_gem_unpin_ioctl(struct drm_device *dev, void *data,
 			 struct drm_file *file_priv);
 int i915_gem_busy_ioctl(struct drm_device *dev, void *data,
 			struct drm_file *file_priv);
-int i915_gem_get_cacheing_ioctl(struct drm_device *dev, void *data,
-				struct drm_file *file);
-int i915_gem_set_cacheing_ioctl(struct drm_device *dev, void *data,
-				struct drm_file *file);
+int i915_gem_get_caching_ioctl(struct drm_device *dev, void *data,
+			       struct drm_file *file);
+int i915_gem_set_caching_ioctl(struct drm_device *dev, void *data,
+			       struct drm_file *file);
 int i915_gem_throttle_ioctl(struct drm_device *dev, void *data,
 			    struct drm_file *file_priv);
 int i915_gem_madvise_ioctl(struct drm_device *dev, void *data,
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index f5ffed1..fa25b85 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3015,10 +3015,10 @@  int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj,
 	return 0;
 }
 
-int i915_gem_get_cacheing_ioctl(struct drm_device *dev, void *data,
-				struct drm_file *file)
+int i915_gem_get_caching_ioctl(struct drm_device *dev, void *data,
+			       struct drm_file *file)
 {
-	struct drm_i915_gem_cacheing *args = data;
+	struct drm_i915_gem_caching *args = data;
 	struct drm_i915_gem_object *obj;
 	int ret;
 
@@ -3032,7 +3032,7 @@  int i915_gem_get_cacheing_ioctl(struct drm_device *dev, void *data,
 		goto unlock;
 	}
 
-	args->cacheing = obj->cache_level != I915_CACHE_NONE;
+	args->caching = obj->cache_level != I915_CACHE_NONE;
 
 	drm_gem_object_unreference(&obj->base);
 unlock:
@@ -3040,10 +3040,10 @@  unlock:
 	return ret;
 }
 
-int i915_gem_set_cacheing_ioctl(struct drm_device *dev, void *data,
-				struct drm_file *file)
+int i915_gem_set_caching_ioctl(struct drm_device *dev, void *data,
+			       struct drm_file *file)
 {
-	struct drm_i915_gem_cacheing *args = data;
+	struct drm_i915_gem_caching *args = data;
 	struct drm_i915_gem_object *obj;
 	enum i915_cache_level level;
 	int ret;
@@ -3052,11 +3052,11 @@  int i915_gem_set_cacheing_ioctl(struct drm_device *dev, void *data,
 	if (ret)
 		return ret;
 
-	switch (args->cacheing) {
-	case I915_CACHEING_NONE:
+	switch (args->caching) {
+	case I915_CACHING_NONE:
 		level = I915_CACHE_NONE;
 		break;
-	case I915_CACHEING_CACHED:
+	case I915_CACHING_CACHED:
 		level = I915_CACHE_LLC;
 		break;
 	default:
diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
index 4515330..b98589d 100644
--- a/include/drm/i915_drm.h
+++ b/include/drm/i915_drm.h
@@ -203,8 +203,8 @@  typedef struct _drm_i915_sarea {
 #define DRM_I915_GEM_WAIT	0x2c
 #define DRM_I915_GEM_CONTEXT_CREATE	0x2d
 #define DRM_I915_GEM_CONTEXT_DESTROY	0x2e
-#define DRM_I915_GEM_SET_CACHEING	0x2f
-#define DRM_I915_GEM_GET_CACHEING	0x30
+#define DRM_I915_GEM_SET_CACHING	0x2f
+#define DRM_I915_GEM_GET_CACHING	0x30
 #define DRM_I915_REG_READ		0x31
 
 #define DRM_IOCTL_I915_INIT		DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t)
@@ -230,8 +230,8 @@  typedef struct _drm_i915_sarea {
 #define DRM_IOCTL_I915_GEM_PIN		DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_PIN, struct drm_i915_gem_pin)
 #define DRM_IOCTL_I915_GEM_UNPIN	DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_UNPIN, struct drm_i915_gem_unpin)
 #define DRM_IOCTL_I915_GEM_BUSY		DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_BUSY, struct drm_i915_gem_busy)
-#define DRM_IOCTL_I915_GEM_SET_CACHEING		DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_SET_CACHEING, struct drm_i915_gem_cacheing)
-#define DRM_IOCTL_I915_GEM_GET_CACHEING		DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_GET_CACHEING, struct drm_i915_gem_cacheing)
+#define DRM_IOCTL_I915_GEM_SET_CACHING		DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_SET_CACHING, struct drm_i915_gem_caching)
+#define DRM_IOCTL_I915_GEM_GET_CACHING		DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_GET_CACHING, struct drm_i915_gem_caching)
 #define DRM_IOCTL_I915_GEM_THROTTLE	DRM_IO ( DRM_COMMAND_BASE + DRM_I915_GEM_THROTTLE)
 #define DRM_IOCTL_I915_GEM_ENTERVT	DRM_IO(DRM_COMMAND_BASE + DRM_I915_GEM_ENTERVT)
 #define DRM_IOCTL_I915_GEM_LEAVEVT	DRM_IO(DRM_COMMAND_BASE + DRM_I915_GEM_LEAVEVT)
@@ -716,21 +716,21 @@  struct drm_i915_gem_busy {
 	__u32 busy;
 };
 
-#define I915_CACHEING_NONE		0
-#define I915_CACHEING_CACHED		1
+#define I915_CACHING_NONE		0
+#define I915_CACHING_CACHED		1
 
-struct drm_i915_gem_cacheing {
+struct drm_i915_gem_caching {
 	/**
-	 * Handle of the buffer to set/get the cacheing level of. */
+	 * Handle of the buffer to set/get the caching level of. */
 	__u32 handle;
 
 	/**
 	 * Cacheing level to apply or return value
 	 *
-	 * bits0-15 are for generic cacheing control (i.e. the above defined
+	 * bits0-15 are for generic caching control (i.e. the above defined
 	 * values). bits16-31 are reserved for platform-specific variations
 	 * (e.g. l3$ caching on gen7). */
-	__u32 cacheing;
+	__u32 caching;
 };
 
 #define I915_TILING_NONE	0