From patchwork Thu Sep 27 08:27:57 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 1512401 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id 5F20540079 for ; Thu, 27 Sep 2012 08:31:30 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 285CC9E910 for ; Thu, 27 Sep 2012 01:31:30 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from fireflyinternet.com (smtp.fireflyinternet.com [109.228.6.236]) by gabe.freedesktop.org (Postfix) with ESMTP id DC6E99E7CA for ; Thu, 27 Sep 2012 01:30:16 -0700 (PDT) X-Default-Received-SPF: pass (skip=forwardok (res=PASS)) x-ip-name=78.156.73.22; Received: from arrandale.alporthouse.com (unverified [78.156.73.22]) by fireflyinternet.com (Firefly Internet SMTP) with ESMTP id 122969027-1500050 for multiple; Thu, 27 Sep 2012 09:30:06 +0100 From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Thu, 27 Sep 2012 09:27:57 +0100 Message-Id: <1348734477-23369-1-git-send-email-chris@chris-wilson.co.uk> X-Mailer: git-send-email 1.7.10.4 X-Originating-IP: 78.156.73.22 Subject: [Intel-gfx] [PATCH] drm/i915: Detect invalid pages for SandyBridge X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org As SandyBridge returns garbage when decoding certain addresses through the GTT (all memory below 1MiB and a very small number of individual pages) we need to prevent the GPU from utilizing those pages. The ultimate goal would be to prevent our allocator from handing us those pages, but that is a longer term project. In the short term, we can detect when we attempt to bind those pages to the GPU and return an error to the application rather than hang the GPU and potentially the system. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_gem_gtt.c | 40 ++++++++++++++++++++++++++++++++--- 1 file changed, 37 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index d9d3fc7..5c7ccfd 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -306,17 +306,51 @@ void i915_gem_restore_gtt_mappings(struct drm_device *dev) intel_gtt_chipset_flush(); } +static bool +gen6_valid_addresses(struct drm_i915_gem_object *obj) +{ + struct scatterlist *sg; + int i; + + for_each_sg(obj->pages->sgl, sg, obj->pages->nents, i) { + dma_addr_t addr = sg_dma_address(sg); + if (WARN(addr < 0x100000 || + addr == 0x20050000 || + addr == 0x20110000 || + addr == 0x20130000 || + addr == 0x20138000 || + addr == 0x40004000, + "object references unaddressable physical pages: addr=%x", + (u32)addr)) + return false; + } + + return true; +} + int i915_gem_gtt_prepare_object(struct drm_i915_gem_object *obj) { - if (obj->has_dma_mapping) - return 0; + int ret; - if (!dma_map_sg(&obj->base.dev->pdev->dev, + if (!obj->has_dma_mapping && + !dma_map_sg(&obj->base.dev->pdev->dev, obj->pages->sgl, obj->pages->nents, PCI_DMA_BIDIRECTIONAL)) return -ENOSPC; + if (IS_GEN6(obj->base.dev) && !gen6_valid_addresses(obj)) { + ret = -EFAULT; + goto unmap; + } + return 0; + +unmap: + if (!obj->has_dma_mapping) + dma_unmap_sg(&obj->base.dev->pdev->dev, + obj->pages->sgl, obj->pages->nents, + PCI_DMA_BIDIRECTIONAL); + return ret; } void i915_gem_gtt_bind_object(struct drm_i915_gem_object *obj,