From patchwork Tue Oct 2 22:43:39 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jesse Barnes X-Patchwork-Id: 1539471 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id D7E733FDAE for ; Tue, 2 Oct 2012 22:46:29 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id ACABF9EE97 for ; Tue, 2 Oct 2012 15:46:29 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from oproxy7-pub.bluehost.com (oproxy7-pub.bluehost.com [67.222.55.9]) by gabe.freedesktop.org (Postfix) with SMTP id 9CFB59E8C6 for ; Tue, 2 Oct 2012 15:44:05 -0700 (PDT) Received: (qmail 12289 invoked by uid 0); 2 Oct 2012 22:44:05 -0000 Received: from unknown (HELO box514.bluehost.com) (74.220.219.114) by oproxy7.bluehost.com with SMTP; 2 Oct 2012 22:44:05 -0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=virtuousgeek.org; s=default; h=References:In-Reply-To:Message-Id:Date:Subject:To:From; bh=xe/gUJqclUFV3INKR753pb07EuY71a+NCTnHJZ5Anf8=; b=ibvYu72/eux8iE+LuUyBqrc4J9TqGAbrGyabC00Oe110fxiNb07Ll3U5bc7k4p0aJsdLhmIVJeQmKGCbdjwQfkH6GSZBgr0iGQftR15OIlpr/45WyNJHDZBLnjXyDDjM; Received: from [192.55.60.129] (port=30963 helo=jbarnes-t420.nims.intel.com) by box514.bluehost.com with esmtpsa (TLSv1:AES256-SHA:256) (Exim 4.76) (envelope-from ) id 1TJBC8-00065W-Nv for intel-gfx@lists.freedesktop.org; Tue, 02 Oct 2012 16:44:04 -0600 From: Jesse Barnes To: intel-gfx@lists.freedesktop.org Date: Tue, 2 Oct 2012 17:43:39 -0500 Message-Id: <1349217826-2538-6-git-send-email-jbarnes@virtuousgeek.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1349217826-2538-1-git-send-email-jbarnes@virtuousgeek.org> References: <1349217826-2538-1-git-send-email-jbarnes@virtuousgeek.org> X-Identified-User: {10642:box514.bluehost.com:virtuous:virtuousgeek.org} {sentby:smtp auth 192.55.60.129 authed with jbarnes@virtuousgeek.org} Subject: [Intel-gfx] [PATCH 05/12] drm/i915: implement WaGTEnableMiFlush on VLV X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org We don't generally use MI_FLUSH these days, but this bit may affect other flushing logic, so set it to be safe. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/intel_ringbuffer.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index 984a0c5..1718c54 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -512,6 +512,9 @@ static int init_render_ring(struct intel_ring_buffer *ring) I915_WRITE(GFX_MODE_GEN7, _MASKED_BIT_DISABLE(GFX_TLB_INVALIDATE_ALWAYS) | _MASKED_BIT_ENABLE(GFX_REPLAY_MODE)); + if (IS_VALLEYVIEW(dev)) + I915_WRITE(MI_MODE, I915_READ(MI_MODE) | + _MASKED_BIT_ENABLE(MI_FLUSH_ENABLE)); } if (INTEL_INFO(dev)->gen >= 5) {