From patchwork Tue Oct 9 18:24:40 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 1571131 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id C910E3FE80 for ; Tue, 9 Oct 2012 18:26:14 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id BC3D6A0968 for ; Tue, 9 Oct 2012 11:26:14 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from fireflyinternet.com (smtp.fireflyinternet.com [109.228.6.236]) by gabe.freedesktop.org (Postfix) with ESMTP id ADAB09F628 for ; Tue, 9 Oct 2012 11:25:06 -0700 (PDT) X-Default-Received-SPF: pass (skip=forwardok (res=PASS)) x-ip-name=78.156.73.22; Received: from arrandale.alporthouse.com (unverified [78.156.73.22]) by fireflyinternet.com (Firefly Internet SMTP) with ESMTP id 123783940-1500050 for multiple; Tue, 09 Oct 2012 19:24:52 +0100 From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Tue, 9 Oct 2012 19:24:40 +0100 Message-Id: <1349807080-9005-4-git-send-email-chris@chris-wilson.co.uk> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1349807080-9005-1-git-send-email-chris@chris-wilson.co.uk> References: <6c3329lntgg@orsmga002.jf.intel.com> <1349807080-9005-1-git-send-email-chris@chris-wilson.co.uk> X-Originating-IP: 78.156.73.22 Subject: [Intel-gfx] [PATCH 4/4] drm/i915: Review the memory barriers around CPU access to buffers X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org We need to treat the GPU core as a distinct processor and so apply the same SMP memory barriers. In this case, in addition to flushing the chipset cache, which is a no-op on LLC platforms, apply a write barrier beforehand. And then when we invalidate the CPU cache, make sure the memory is coherent (again this was a no-op on LLC platforms). Signed-off-by: Chris Wilson --- drivers/char/agp/intel-gtt.c | 1 + drivers/gpu/drm/i915/i915_gem.c | 1 + 2 files changed, 2 insertions(+) diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c index 8b0f6d19..1223128 100644 --- a/drivers/char/agp/intel-gtt.c +++ b/drivers/char/agp/intel-gtt.c @@ -1706,6 +1706,7 @@ EXPORT_SYMBOL(intel_gtt_get); void intel_gtt_chipset_flush(void) { + wmb(); if (intel_private.driver->chipset_flush) intel_private.driver->chipset_flush(); } diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index ed8d21a..b1ebb88 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -3528,6 +3528,7 @@ i915_gem_object_set_to_cpu_domain(struct drm_i915_gem_object *obj, bool write) /* Flush the CPU cache if it's still invalid. */ if ((obj->base.read_domains & I915_GEM_DOMAIN_CPU) == 0) { i915_gem_clflush_object(obj); + mb(); /* in case the clflush above is optimised away */ obj->base.read_domains |= I915_GEM_DOMAIN_CPU; }