From patchwork Thu Oct 11 14:24:04 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Damien Lespiau X-Patchwork-Id: 1582211 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id 84A5B3FD9C for ; Thu, 11 Oct 2012 14:24:20 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 783189F601 for ; Thu, 11 Oct 2012 07:24:20 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-we0-f177.google.com (mail-we0-f177.google.com [74.125.82.177]) by gabe.freedesktop.org (Postfix) with ESMTP id 7EF839E773 for ; Thu, 11 Oct 2012 07:24:10 -0700 (PDT) Received: by mail-we0-f177.google.com with SMTP id u50so1088326wey.36 for ; Thu, 11 Oct 2012 07:24:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:subject:date:message-id:x-mailer; bh=52PS+Bv9A0ACLzdzI+MpZheetxXgWZ8xPmBmBd3nFqM=; b=oFc9K0jBMCW2DKT/BtsY9l4zGE3tHTbbUYXZKyJ/khfW0lxsuLLP8zFiTa1ujB39j5 m0QZ7jw69gRc6XGYcM8ZWud6vxD4cfSiru/Yca1GKTdx0g+V4zWe65tkVkHOMv9+biBJ OOteMqzp/3Rdhox2QMckuhyLQzWzFOafG35iJnFZyabnJ/HPcBbxstMU4frYLcK9nWUo g3w4AK+LQfrnAQgPhwlukePibh8Ardl0jZ17xgUWQqMjDiOXoXMXgpLDv48/Mz5mo+Y6 UotO1L5bPtZp0CQbGkvvfA/qMWLPTml2DMde8lPkPNREPJ0zEvKGB7+jCJLB9OFTqbj0 Sg5Q== Received: by 10.180.101.230 with SMTP id fj6mr2667773wib.16.1349965449597; Thu, 11 Oct 2012 07:24:09 -0700 (PDT) Received: from localhost.localdomain ([83.217.123.106]) by mx.google.com with ESMTPS id m14sm35594392wie.8.2012.10.11.07.24.07 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 11 Oct 2012 07:24:07 -0700 (PDT) From: Damien Lespiau To: intel-gfx@lists.freedesktop.org Date: Thu, 11 Oct 2012 15:24:04 +0100 Message-Id: <1349965444-13832-1-git-send-email-damien.lespiau@gmail.com> X-Mailer: git-send-email 1.7.7.5 Subject: [Intel-gfx] [PATCH] drm/i915: Fix the SCC/SSC typo in the SPLL bits definition X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org From: Damien Lespiau We're talking about Spread Spectrum Clocks here, thus SSC. Signed-off-by: Damien Lespiau --- drivers/gpu/drm/i915/i915_reg.h | 6 +++--- drivers/gpu/drm/i915/intel_ddi.c | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index c8c8dd0..8200c31 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -4496,8 +4496,8 @@ /* SPLL */ #define SPLL_CTL 0x46020 #define SPLL_PLL_ENABLE (1<<31) -#define SPLL_PLL_SCC (1<<28) -#define SPLL_PLL_NON_SCC (2<<28) +#define SPLL_PLL_SSC (1<<28) +#define SPLL_PLL_NON_SSC (2<<28) #define SPLL_PLL_FREQ_810MHz (0<<26) #define SPLL_PLL_FREQ_1350MHz (1<<26) @@ -4506,7 +4506,7 @@ #define WRPLL_CTL2 0x46060 #define WRPLL_PLL_ENABLE (1<<31) #define WRPLL_PLL_SELECT_SSC (0x01<<28) -#define WRPLL_PLL_SELECT_NON_SCC (0x02<<28) +#define WRPLL_PLL_SELECT_NON_SSC (0x02<<28) #define WRPLL_PLL_SELECT_LCPLL_2700 (0x03<<28) /* WRPLL divider programming */ #define WRPLL_DIVIDER_REFERENCE(x) ((x)<<0) diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index e79d0db..a78860a 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -814,7 +814,7 @@ bool intel_ddi_pll_mode_set(struct drm_crtc *crtc, int clock) WARN(I915_READ(reg) & SPLL_PLL_ENABLE, "SPLL already enabled\n"); - val = SPLL_PLL_ENABLE | SPLL_PLL_FREQ_1350MHz | SPLL_PLL_SCC; + val = SPLL_PLL_ENABLE | SPLL_PLL_FREQ_1350MHz | SPLL_PLL_SSC; } else { WARN(1, "Invalid DDI encoder type %d\n", type);