From patchwork Thu Oct 11 18:08:28 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 1583891 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id 44982DFABE for ; Thu, 11 Oct 2012 19:19:35 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 485AAA08D4 for ; Thu, 11 Oct 2012 12:19:35 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wg0-f43.google.com (mail-wg0-f43.google.com [74.125.82.43]) by gabe.freedesktop.org (Postfix) with ESMTP id D7601A0273 for ; Thu, 11 Oct 2012 12:16:46 -0700 (PDT) Received: by mail-wg0-f43.google.com with SMTP id dq11so1423124wgb.12 for ; Thu, 11 Oct 2012 12:16:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=dOW84hogGjCCb8kgQaevbScongloihE/zkIAyaZl97Y=; b=E6JWtZevgijn6wVvyZqN8dJZ/s0tXpXEQnJm2CxG8cStftFfJsciO8D+f9yZjycw9K N7HoJMt73UEYKKsTCUq0T6s7GmGd1xsS5etgB3L8BFZSoFEZwxEMIZJA4Zvi1sNbx2LI 9q11UH4PJ12mAixzfNvwCWZEwca1wVGqdrlAQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=dOW84hogGjCCb8kgQaevbScongloihE/zkIAyaZl97Y=; b=KZtbZ97OjbjnfoHAvL8tRwFEAsTXytzEAqjkoY7UoGlrU4nSg2+Dd5Z6M1pSXgUK0R yzCbMx889ef+CEuE3NB4okKlVibK2H8gZ0Qkw4++h1xYnGUdeUBdZGtr7Eh9RofukPJb zD09840BdABXf4VIwAdhG1DtOfk0Tq8DWkRkkDLv76/CSlBMP3DnGK0EbCjaDzqAo4yS P0JBwX1WaldTohbEvA9wQio8Ktr9bQeHOP68fQAAfplotwoVcILOt+2yRWivESf7aJrX E3PhS3cC+AttTlYAULyPsp+GJuCA8JY6l0+wCCJsVY5QufoPH5fseh9UL9UW86OY+U2U OvUQ== Received: by 10.180.83.101 with SMTP id p5mr146610wiy.2.1349983006434; Thu, 11 Oct 2012 12:16:46 -0700 (PDT) Received: from wespe.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id ei1sm87266wid.7.2012.10.11.12.16.44 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 11 Oct 2012 12:16:45 -0700 (PDT) From: Daniel Vetter To: Intel Graphics Development Date: Thu, 11 Oct 2012 20:08:28 +0200 Message-Id: <1349978908-7687-7-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.11.2 In-Reply-To: <1349978908-7687-1-git-send-email-daniel.vetter@ffwll.ch> References: <1349978908-7687-1-git-send-email-daniel.vetter@ffwll.ch> X-Gm-Message-State: ALoCoQkqTngP6tr7LBHG2glEwlLr3RqQOtMTeVrqKq4lOiN0aE8EHDmEO19kMW6fEBkaVxPg+hAf Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 6/6] drm/i915: don't save/restore HWS_PGA reg for kms X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org We already do that as part of the ringbuffer re-setup at resume time. Furthermore the register offset has moved on gen6+ around quite a bit, and on ilk/gm45 we also need to restore the HWS reg for the bsd ring, not just the render ring. So again in kms mode this is only confusing a best, hence don't bother. Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/i915_suspend.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c index 44893be..f9630d9 100644 --- a/drivers/gpu/drm/i915/i915_suspend.c +++ b/drivers/gpu/drm/i915/i915_suspend.c @@ -814,7 +814,8 @@ int i915_save_state(struct drm_device *dev) mutex_lock(&dev->struct_mutex); /* Hardware status page */ - dev_priv->saveHWS = I915_READ(HWS_PGA); + if (drm_core_check_feature(dev, DRIVER_MODESET)) + dev_priv->saveHWS = I915_READ(HWS_PGA); i915_save_display(dev); @@ -867,7 +868,8 @@ int i915_restore_state(struct drm_device *dev) mutex_lock(&dev->struct_mutex); /* Hardware status page */ - I915_WRITE(HWS_PGA, dev_priv->saveHWS); + if (drm_core_check_feature(dev, DRIVER_MODESET)) + I915_WRITE(HWS_PGA, dev_priv->saveHWS); i915_restore_display(dev);