From patchwork Mon Oct 15 02:10:37 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jesse Barnes X-Patchwork-Id: 1591981 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id 5E17440135 for ; Mon, 15 Oct 2012 02:23:06 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8497D9E99F for ; Sun, 14 Oct 2012 19:23:05 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from oproxy9.bluehost.com (oproxy9.bluehost.com [69.89.24.6]) by gabe.freedesktop.org (Postfix) with SMTP id D252F9E738 for ; Sun, 14 Oct 2012 19:10:40 -0700 (PDT) Received: (qmail 4793 invoked by uid 0); 15 Oct 2012 02:10:40 -0000 Received: from unknown (HELO box514.bluehost.com) (74.220.219.114) by oproxy9.bluehost.com with SMTP; 15 Oct 2012 02:10:40 -0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=virtuousgeek.org; s=default; h=References:In-Reply-To:Message-Id:Date:Subject:To:From; bh=c7UpU+WB2pAImhyyZ8X3wQgrkj/trBHtRaEkRYSgmzQ=; b=cKez1NLFkrNEPVhXSDqF6qBbuhQQALB+2xpHcReE/kHpizvsdR+gh/B2/2g6qIsoU/IH0+aT0lbUdkCObuV4AHA7QF3rQqllXV12x10iP0Vjv21uJsWbmE9mTCKbDOW2; Received: from [12.216.224.66] (port=42917 helo=localhost.localdomain) by box514.bluehost.com with esmtpsa (TLSv1:AES256-SHA:256) (Exim 4.76) (envelope-from ) id 1TNa8d-0004T1-Ud for intel-gfx@lists.freedesktop.org; Sun, 14 Oct 2012 20:10:40 -0600 From: Jesse Barnes To: intel-gfx@lists.freedesktop.org Date: Sun, 14 Oct 2012 19:10:37 -0700 Message-Id: <1350267038-3599-2-git-send-email-jbarnes@virtuousgeek.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1350267038-3599-1-git-send-email-jbarnes@virtuousgeek.org> References: <1350267038-3599-1-git-send-email-jbarnes@virtuousgeek.org> X-Identified-User: {10642:box514.bluehost.com:virtuous:virtuousgeek.org} {sentby:smtp auth 12.216.224.66 authed with jbarnes@virtuousgeek.org} Subject: [Intel-gfx] [PATCH 2/3] drm/i915: put ring frequency and turbo setup into a work queue X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Communicating via the mailbox registers with the PCU can take quite awhile. And updating the ring frequency or enabling turbo is not something that needs to happen synchronously, so take it out of our init and resume paths to speed things up (~200ms on my T420). Signed-of-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_dma.c | 1 + drivers/gpu/drm/i915/i915_drv.h | 3 +++ drivers/gpu/drm/i915/intel_pm.c | 25 +++++++++++++++++++++++-- 3 files changed, 27 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index f88bfa6..9780845 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c @@ -1723,6 +1723,7 @@ int i915_driver_unload(struct drm_device *dev) if (drm_core_check_feature(dev, DRIVER_MODESET)) { intel_fbdev_fini(dev); intel_modeset_cleanup(dev); + intel_gt_cleanup(dev); cancel_work_sync(&dev_priv->console_resume_work); /* diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index e22b9e3..8418345 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -875,6 +875,8 @@ typedef struct drm_i915_private { int r_t; } ips; + struct work_struct gen6_power_work; + enum no_fbc_reason no_fbc_reason; struct drm_mm_node *compressed_fb; @@ -1271,6 +1273,7 @@ void i915_handle_error(struct drm_device *dev, bool wedged); extern void intel_irq_init(struct drm_device *dev); extern void intel_gt_init(struct drm_device *dev); +extern void intel_gt_cleanup(struct drm_device *dev); void i915_error_state_free(struct kref *error_ref); diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 07da990..fbf10b8 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -3286,15 +3286,28 @@ void intel_disable_gt_powersave(struct drm_device *dev) } } +static void intel_gen6_powersave_work(struct work_struct *work) +{ + struct drm_i915_private *dev_priv = + container_of(work, struct drm_i915_private, gen6_power_work); + struct drm_device *dev = dev_priv->dev; + + mutex_lock(&dev->struct_mutex); + gen6_enable_rps(dev); + gen6_update_ring_freq(dev); + mutex_unlock(&dev->struct_mutex); +} + void intel_enable_gt_powersave(struct drm_device *dev) { + struct drm_i915_private *dev_priv = dev->dev_private; + if (IS_IRONLAKE_M(dev)) { ironlake_enable_drps(dev); ironlake_enable_rc6(dev); intel_init_emon(dev); } else if ((IS_GEN6(dev) || IS_GEN7(dev)) && !IS_VALLEYVIEW(dev)) { - gen6_enable_rps(dev); - gen6_update_ring_freq(dev); + schedule_work(&dev_priv->gen6_power_work); } } @@ -4149,6 +4162,14 @@ void intel_gt_init(struct drm_device *dev) __gen6_gt_force_wake_mt_put; } } + INIT_WORK(&dev_priv->gen6_power_work, + intel_gen6_powersave_work); } } +void intel_gt_cleanup(struct drm_device *dev) +{ + struct drm_i915_private *dev_priv = dev->dev_private; + + cancel_work_sync(&dev_priv->gen6_power_work); +}