From patchwork Wed Oct 17 09:32:57 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 1604771 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id 294EA3FE36 for ; Wed, 17 Oct 2012 10:42:27 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 09EAEA0948 for ; Wed, 17 Oct 2012 03:42:27 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-we0-f177.google.com (mail-we0-f177.google.com [74.125.82.177]) by gabe.freedesktop.org (Postfix) with ESMTP id 943BC9E8FE for ; Wed, 17 Oct 2012 03:41:06 -0700 (PDT) Received: by mail-we0-f177.google.com with SMTP id u50so4478787wey.36 for ; Wed, 17 Oct 2012 03:41:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=Bl7qM99+cIwTUpDoH+0hr0zLZQ+T47wYcvHcUDKIjVU=; b=MmGv+T1v2BtiispQZM106LsBaCrSQ05ERJQI79sR9quXVsZXWAXiUiafTG1+46ywKC cKLL3EUvA3uv05laeK3SzvSI924yQ9Rngdu73IKzjxZavnG5b0br41wT5k1m415xfCiQ SpbPXCUJcZdjv8rM0slccyazpDLG5SXx661z8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=Bl7qM99+cIwTUpDoH+0hr0zLZQ+T47wYcvHcUDKIjVU=; b=hPm2FadPtnWEQn5cuDuKfj6RQOTA0O7pmf/tmlpVsQvQBblxAVsdqnwnUmL2PAQBni 05YG+yXcYR4Sze5f4ua59UwdUrqPhVbCOs378SlV1bUjQHRREl43ryN4coUBIYnqrkQH sPKsz89gc57TYLBw28m6zPZaGXaUxOCfKm38Tvjpof9SIcbnNYcRtuv4dJ9CBYODLFbo +nC7hhFUdobvywbdqYbYOj46534ZA0KkHjSUJac31om3WyjY1Pq5uN9eJMuSVbhcnAGg cZGPQEAHU6PJx4Yk4Zfi5MO5EsS/S+a76JVLePpx4BpLnShNt38rbFFsEL5pHaHGvWpU OEeA== Received: by 10.216.27.84 with SMTP id d62mr10518954wea.3.1350470465710; Wed, 17 Oct 2012 03:41:05 -0700 (PDT) Received: from wespe.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id dm3sm26923859wib.3.2012.10.17.03.41.04 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 17 Oct 2012 03:41:05 -0700 (PDT) From: Daniel Vetter To: Intel Graphics Development Date: Wed, 17 Oct 2012 11:32:57 +0200 Message-Id: <1350466377-19382-3-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.11.7 In-Reply-To: <1350466377-19382-1-git-send-email-daniel.vetter@ffwll.ch> References: <1349978908-7687-7-git-send-email-daniel.vetter@ffwll.ch> <1350466377-19382-1-git-send-email-daniel.vetter@ffwll.ch> X-Gm-Message-State: ALoCoQnuBzNar+Ak4u4ojMZGLvfUbnf3zl/D1sbyj96CXnoSTgJdIL9rztAaug3UFOtOo+Yk9I4v Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 3/3] drm/i915: don't save/restore HWS_PGA reg for kms X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org We already do that as part of the ringbuffer re-setup at resume time. Furthermore the register offset has moved on gen6+ around quite a bit, and on ilk/gm45 we also need to restore the HWS reg for the bsd ring, not just the render ring. So again in kms mode this is only confusing a best, hence don't bother. v2: Fixup logic, noticed by Paulo Zanoni. Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/i915_suspend.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c index ac6d412..33121aa 100644 --- a/drivers/gpu/drm/i915/i915_suspend.c +++ b/drivers/gpu/drm/i915/i915_suspend.c @@ -814,7 +814,8 @@ int i915_save_state(struct drm_device *dev) mutex_lock(&dev->struct_mutex); /* Hardware status page */ - dev_priv->saveHWS = I915_READ(HWS_PGA); + if (!drm_core_check_feature(dev, DRIVER_MODESET)) + dev_priv->saveHWS = I915_READ(HWS_PGA); i915_save_display(dev); @@ -867,7 +868,8 @@ int i915_restore_state(struct drm_device *dev) mutex_lock(&dev->struct_mutex); /* Hardware status page */ - I915_WRITE(HWS_PGA, dev_priv->saveHWS); + if (!drm_core_check_feature(dev, DRIVER_MODESET)) + I915_WRITE(HWS_PGA, dev_priv->saveHWS); i915_restore_display(dev);