From patchwork Thu Oct 18 08:15:26 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 1609181 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id D53BD3FE36 for ; Thu, 18 Oct 2012 09:43:57 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C13EA9E84E for ; Thu, 18 Oct 2012 02:43:57 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-ee0-f49.google.com (mail-ee0-f49.google.com [74.125.83.49]) by gabe.freedesktop.org (Postfix) with ESMTP id 60ECD9EB0F for ; Thu, 18 Oct 2012 01:15:43 -0700 (PDT) Received: by mail-ee0-f49.google.com with SMTP id c1so4333544eek.36 for ; Thu, 18 Oct 2012 01:15:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=BOfdprdIKFT+fMCsUw7ZMwCZ1Chhq9umxIdNEIlvrR4=; b=BEgWuFMlPH0fdu1XE5YhcVa7guIc3x1R9f7aIjfCmn8WdJkFUiNcCtF02ONltfxSuI KixqshhCX2kXfmMsukBlOCh0+9jTV4lidsd/CDGykQZKjwUIF3AzyzS9+KpF2FHrk6d0 eNsULIXIEJxnW6OI9c6hxhQKGcUbZpR4FYKn8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=BOfdprdIKFT+fMCsUw7ZMwCZ1Chhq9umxIdNEIlvrR4=; b=MTTxGnqZZdDuAV9twUnyOwhE7EQjI7kZpPfY7FElxOqbBeznOzbBuQQZ2TelfdpQSS El1Bjw9lgj7B1Z6SsbCYMVzbFghblogsaeiftq6QtowZxK26up4z0QvdxLQ7+lu1ZAzJ +N0Up6TZUYRAF/vvaidr4H3LnlcaEDrst3Emtyj25edxreuI6BrcsQNBvwcpYqhLGqHX ZVvbHdmm6S/uXtZCqvY5JtYFeG1HsH7kp7qAQbexT7lCwbp7D1pzphdZFhOtdULagM6+ P+lIgKgRgCdGZ3cpoVoeAKlGY4YvUc7yYDKhunnh8Nvz+LWDNgCc5AG+3KkK3Hk4lDW7 mSMA== Received: by 10.14.203.132 with SMTP id f4mr6825766eeo.11.1350548142855; Thu, 18 Oct 2012 01:15:42 -0700 (PDT) Received: from bremse.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id 42sm38586341eee.0.2012.10.18.01.15.41 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 18 Oct 2012 01:15:42 -0700 (PDT) From: Daniel Vetter To: DRI Development Date: Thu, 18 Oct 2012 10:15:26 +0200 Message-Id: <1350548132-3037-5-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.11.4 In-Reply-To: <1350548132-3037-1-git-send-email-daniel.vetter@ffwll.ch> References: <1350548132-3037-1-git-send-email-daniel.vetter@ffwll.ch> X-Gm-Message-State: ALoCoQlsVSousC6hXy15rvsLXr5kOQa09zfSr4rWY4CLBS+66VLnDttzOfca8JySO39lrCrHRX2P Cc: nouveau@lists.freedesktop.org, Intel Graphics Development , xorg-driver-ati@lists.x.org, Daniel Vetter Subject: [Intel-gfx] [PATCH 04/10] drm/nouveau: use the cr_ok/chanel_eq_ok helpers X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Only compile-tested, due to a lack of nouveau dp hw. Should be equivalent code though. Signed-off-by: Daniel Vetter --- drivers/gpu/drm/nouveau/nouveau_dp.c | 26 +++++--------------------- 1 file changed, 5 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nouveau_dp.c b/drivers/gpu/drm/nouveau/nouveau_dp.c index e754aa3..60d561e 100644 --- a/drivers/gpu/drm/nouveau/nouveau_dp.c +++ b/drivers/gpu/drm/nouveau/nouveau_dp.c @@ -298,7 +298,7 @@ dp_link_train_cr(struct drm_device *dev, struct dp_state *dp) { bool cr_done = false, abort = false; int voltage = dp->conf[0] & DP_TRAIN_VOLTAGE_SWING_MASK; - int tries = 0, i; + int tries = 0; dp_set_training_pattern(dev, dp, DP_TRAINING_PATTERN_1); @@ -307,16 +307,7 @@ dp_link_train_cr(struct drm_device *dev, struct dp_state *dp) dp_link_train_update(dev, dp, 100)) break; - cr_done = true; - for (i = 0; i < dp->link_nr; i++) { - u8 lane = (dp->stat[i >> 1] >> ((i & 1) * 4)) & 0xf; - if (!(lane & DP_LANE_CR_DONE)) { - cr_done = false; - if (dp->conf[i] & DP_TRAIN_MAX_SWING_REACHED) - abort = true; - break; - } - } + cr_done = drm_dp_clock_recovery_ok(dp->stat, dp->link_nr); if ((dp->conf[0] & DP_TRAIN_VOLTAGE_SWING_MASK) != voltage) { voltage = dp->conf[0] & DP_TRAIN_VOLTAGE_SWING_MASK; @@ -331,7 +322,7 @@ static int dp_link_train_eq(struct drm_device *dev, struct dp_state *dp) { bool eq_done, cr_done = true; - int tries = 0, i; + int tries = 0; dp_set_training_pattern(dev, dp, DP_TRAINING_PATTERN_2); @@ -339,15 +330,8 @@ dp_link_train_eq(struct drm_device *dev, struct dp_state *dp) if (dp_link_train_update(dev, dp, 400)) break; - eq_done = !!(dp->stat[2] & DP_INTERLANE_ALIGN_DONE); - for (i = 0; i < dp->link_nr && eq_done; i++) { - u8 lane = (dp->stat[i >> 1] >> ((i & 1) * 4)) & 0xf; - if (!(lane & DP_LANE_CR_DONE)) - cr_done = false; - if (!(lane & DP_LANE_CHANNEL_EQ_DONE) || - !(lane & DP_LANE_SYMBOL_LOCKED)) - eq_done = false; - } + eq_done = drm_dp_channel_eq_ok(dp->stat, dp->link_nr); + cr_done = drm_dp_clock_recovery_ok(dp->stat, dp->link_nr); if (dp_link_train_commit(dev, dp)) break;