From patchwork Thu Oct 18 08:15:28 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 1609231 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id 6E0FEDFB34 for ; Thu, 18 Oct 2012 09:49:52 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 579239EB0F for ; Thu, 18 Oct 2012 02:49:52 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-ee0-f49.google.com (mail-ee0-f49.google.com [74.125.83.49]) by gabe.freedesktop.org (Postfix) with ESMTP id B657AA09D9 for ; Thu, 18 Oct 2012 01:15:45 -0700 (PDT) Received: by mail-ee0-f49.google.com with SMTP id c1so4333557eek.36 for ; Thu, 18 Oct 2012 01:15:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=y/iaT1QYVvoKTuEGrzZjTSDHsEeAFvKhSUybtOppxb8=; b=Zv2i91UM4Rx7wXIqvKIsuDteydhIENhCwrTDqvp//ul51s4hBlchcOkT7qqbY/uwGr qLGzjFGKPatwJdVKf38ctw2ix45qzJv+3oZ8vsVpMDpPrcBF5Kv0HEP/vu6riUPIbeKv CT4H56yh6dyZOi6etnetutS16P6/FQz+zbLOE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=y/iaT1QYVvoKTuEGrzZjTSDHsEeAFvKhSUybtOppxb8=; b=PhicM3ZqVbQzLPBGlB2RREwNwR4qKmcTfFn/tbaA3Y95bSmqsrNrBIdkJJekbUYQl6 Rv/0HGGSU+dpcIkN3rL01r6nv4FrQhQIv0++Hzw5HHhTi5rfy8QubhHiAsPvco1kTTrN yII3lBi0hMfpLxMTYK+YAtqqgDRp4uNNaHRo5dKVa1e67wnVcz03AOlrPfcY+HkQLaVn 6s32xX9uf75/juXOLEA0vDPCQRwYdlSY2zfcMrH7TXPyFUo1EjyY4fBPNyAKY1jgL9XS ++PapzXOtPzMXd+SQaDe+mY7X4W5Yotpi5oI4xee+ES1wUB4mkT4BOcqwUOI4t4GrTn6 QX0w== Received: by 10.14.199.132 with SMTP id x4mr30544399een.37.1350548144733; Thu, 18 Oct 2012 01:15:44 -0700 (PDT) Received: from bremse.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id 42sm38586341eee.0.2012.10.18.01.15.43 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 18 Oct 2012 01:15:44 -0700 (PDT) From: Daniel Vetter To: DRI Development Date: Thu, 18 Oct 2012 10:15:28 +0200 Message-Id: <1350548132-3037-7-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.11.4 In-Reply-To: <1350548132-3037-1-git-send-email-daniel.vetter@ffwll.ch> References: <1350548132-3037-1-git-send-email-daniel.vetter@ffwll.ch> X-Gm-Message-State: ALoCoQkbQFNKMJkeVHcHmBuGRpzay86Ps4FotYVngMGZ/tNQGrt9WAmS95m6FnfAzaCZsXJLR6QC Cc: nouveau@lists.freedesktop.org, Intel Graphics Development , xorg-driver-ati@lists.x.org, Daniel Vetter Subject: [Intel-gfx] [PATCH 06/10] drm/nouveau: use dp link train request helper X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org nouveau again score with an impressive density of magic numbers. Again only compile-tested due to lack of hw, but should be equivalent code. Signed-off-by: Daniel Vetter --- drivers/gpu/drm/nouveau/nouveau_dp.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nouveau_dp.c b/drivers/gpu/drm/nouveau/nouveau_dp.c index 60d561e..d46a8ff 100644 --- a/drivers/gpu/drm/nouveau/nouveau_dp.c +++ b/drivers/gpu/drm/nouveau/nouveau_dp.c @@ -261,11 +261,10 @@ dp_link_train_commit(struct drm_device *dev, struct dp_state *dp) int i; for (i = 0; i < dp->link_nr; i++) { - u8 lane = (dp->stat[4 + (i >> 1)] >> ((i & 1) * 4)) & 0xf; - u8 lpre = (lane & 0x0c) >> 2; - u8 lvsw = (lane & 0x03) >> 0; + u8 lpre = drm_dp_get_adjust_request_pre_emphasis(dp->stat, i); + u8 lvsw = drm_dp_get_adjust_request_voltage(dp->stat, i); - dp->conf[i] = (lpre << 3) | lvsw; + dp->conf[i] = lpre | lvsw; if (lvsw == DP_TRAIN_VOLTAGE_SWING_1200) dp->conf[i] |= DP_TRAIN_MAX_SWING_REACHED; if ((lpre << 3) == DP_TRAIN_PRE_EMPHASIS_9_5)