From patchwork Thu Oct 18 09:49:52 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 1609581 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id C6ED93FE36 for ; Thu, 18 Oct 2012 10:15:16 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B3492A0A19 for ; Thu, 18 Oct 2012 03:15:16 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-ee0-f49.google.com (mail-ee0-f49.google.com [74.125.83.49]) by gabe.freedesktop.org (Postfix) with ESMTP id C41979E832 for ; Thu, 18 Oct 2012 02:32:06 -0700 (PDT) Received: by mail-ee0-f49.google.com with SMTP id c1so4370674eek.36 for ; Thu, 18 Oct 2012 02:32:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=4wTQD21uz5//zNVg75yeKvrM7JQwMlX0F/vnJiBnp6w=; b=KlhEx+VS2xY5GXN367GrbiZy9avkMQgB1CXEb2A5LcQf+fnuIjF/PEJy13geey8OKT 58vBr89U6OWka8Z0irhaQBOCc32WjC7WO+9oONkdM1R4Aj8KOWzpldmApQX4H7Qin5kp rrYpZhlo0D8Ow7y8Qgg8my3i9flHuSqpZ/5PM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=4wTQD21uz5//zNVg75yeKvrM7JQwMlX0F/vnJiBnp6w=; b=IounihLkOqAPsEe9ZW23lgDrmVKDC6K6ruJmUBQyYhCUUS+Hx1fgbqgmOGMIwietvc UZr7s4izROmdFHxhPCuaN1BYpBJk0fYNAHMefOIVRUbMlIFXDNOFrfy5HEQmImYV9NY6 p0Cr/R7q+TrT2UXuG6ZGQFSUZ6W3JFBolL/Tros9XrfdI/EvCZi8kbx/mWgxImcs5Eee sgzmaYyxrjrLK/AfXFcHt+rVZ4QouwWXmlQwgSbLYc0NFFcMbLKIZos47qrMR+0Tr4Rj /7UFwWLMhH8dcxt4eQCOGpwcoQHlQQJ4X2BGhh7sR00urUMpRyoXYWB4Rx3m7vj6FibX EsSg== Received: by 10.14.212.72 with SMTP id x48mr30464445eeo.40.1350552725934; Thu, 18 Oct 2012 02:32:05 -0700 (PDT) Received: from hummel.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id k2sm6200817eep.15.2012.10.18.02.32.05 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 18 Oct 2012 02:32:05 -0700 (PDT) From: Daniel Vetter To: Intel Graphics Development Date: Thu, 18 Oct 2012 11:49:52 +0200 Message-Id: <1350553794-5534-4-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1350553794-5534-1-git-send-email-daniel.vetter@ffwll.ch> References: <1350553794-5534-1-git-send-email-daniel.vetter@ffwll.ch> X-Gm-Message-State: ALoCoQmpHp11QnxORToCyzx6Sv5y3vXWFYKkrovnBE+Ib0fmY6klUO5C982mYrymx3TvNIz3Kt31 Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 3/5] drm/i915: WaInsertNoopAfterBatchEndCommand X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Comment says that this applies to earlier gens, too. Since two more MI_NOOP's can't hurt that much, I've figured I'll apply this w/a down to gen2. v2: Correct the ringbuffer dword count for gen3, spotted by Chris Wilson. Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_ringbuffer.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index 984a0c5..38092dc 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -969,7 +969,7 @@ i965_dispatch_execbuffer(struct intel_ring_buffer *ring, u32 offset, u32 length) { int ret; - ret = intel_ring_begin(ring, 2); + ret = intel_ring_begin(ring, 4); if (ret) return ret; @@ -978,6 +978,11 @@ i965_dispatch_execbuffer(struct intel_ring_buffer *ring, u32 offset, u32 length) MI_BATCH_GTT | MI_BATCH_NON_SECURE_I965); intel_ring_emit(ring, offset); + /* WaInsertNoopAfterBatchEndCommand: Command says to do the same after + * the batchbuffer start command. Unclear whether really required on + * gen3, but better safe than sorry. */ + intel_ring_emit(ring, MI_NOOP); + intel_ring_emit(ring, MI_NOOP); intel_ring_advance(ring); return 0; @@ -996,7 +1001,10 @@ i830_dispatch_execbuffer(struct intel_ring_buffer *ring, intel_ring_emit(ring, MI_BATCH_BUFFER); intel_ring_emit(ring, offset | MI_BATCH_NON_SECURE); intel_ring_emit(ring, offset + len - 8); - intel_ring_emit(ring, 0); + /* WaInsertNoopAfterBatchEndCommand: Command says to do the same after + * the batchbuffer start command. Unclear whether really required on + * gen2, but better safe than sorry. */ + intel_ring_emit(ring, MI_NOOP); intel_ring_advance(ring); return 0; @@ -1008,12 +1016,16 @@ i915_dispatch_execbuffer(struct intel_ring_buffer *ring, { int ret; - ret = intel_ring_begin(ring, 2); + ret = intel_ring_begin(ring, 4); if (ret) return ret; intel_ring_emit(ring, MI_BATCH_BUFFER_START | MI_BATCH_GTT); intel_ring_emit(ring, offset | MI_BATCH_NON_SECURE); + /* WaInsertNoopAfterBatchEndCommand: Command says to do the same after + * the batchbuffer start command. */ + intel_ring_emit(ring, MI_NOOP); + intel_ring_emit(ring, MI_NOOP); intel_ring_advance(ring); return 0;