From patchwork Thu Oct 18 12:14:14 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 1610121 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id 9EFBBDFB34 for ; Thu, 18 Oct 2012 11:57:46 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 82A72A0A1F for ; Thu, 18 Oct 2012 04:57:46 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wg0-f43.google.com (mail-wg0-f43.google.com [74.125.82.43]) by gabe.freedesktop.org (Postfix) with ESMTP id 9DB359E815 for ; Thu, 18 Oct 2012 04:56:23 -0700 (PDT) Received: by mail-wg0-f43.google.com with SMTP id dq11so5764108wgb.12 for ; Thu, 18 Oct 2012 04:56:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=TC9PVFb5wiLTRA7PsCkB5OZGedYLfoCPp79xYLXhoOU=; b=AY4gPQQ2DP/MFELPIlfenRzGMjWVEf8ItNniwq8FNUT3bXrfOVUYELl4eTjvQmEMj6 YYb1U/bNZK/v6lvrt+d4JLqXi9PC2ytBHl0kVI0Lna/hVRtNgNR3jUqgCK+reD7y2ph1 VWANYAYY3CrBjcdMDRdMSHuR3AgClC1FIe7zU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=TC9PVFb5wiLTRA7PsCkB5OZGedYLfoCPp79xYLXhoOU=; b=l3QPZUUBh9FXhtaSl0br6ScLAUwnulWtneAMIuYP5XiMCLhK3/qik9cmHPPdMSpww8 USC7VCAh9uOgm57pi24vKfaV69biHqGzaRGVECo2W2LS0Z5lsOYYlXtFUkYxdbdi+5kB Vhs5H1sKXIas2s1iIMBsqkixqr266a/d4ziM0o92AJoiA0DSsB1sN271MEorl9UKErrm XmvfQgCuvdk1Qi8cwCqnfZ2Iq9tNHbDtgPOd0yts/zGP73IVSDrsBQ5rQfO+pRSExPEc 5/J/8dwr2P+d6wwfyDY/VV1sMEDRvHy10iPdVtfCxs00uIfdXAoswuuXcAYDT2podABo pCHA== Received: by 10.180.83.227 with SMTP id t3mr10833986wiy.13.1350561382826; Thu, 18 Oct 2012 04:56:22 -0700 (PDT) Received: from hummel.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id j8sm29240274wiy.9.2012.10.18.04.56.21 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 18 Oct 2012 04:56:22 -0700 (PDT) From: Daniel Vetter To: Intel Graphics Development Date: Thu, 18 Oct 2012 14:14:14 +0200 Message-Id: <1350562454-5809-1-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <275ffc$71to91@fmsmga002.fm.intel.com> References: <275ffc$71to91@fmsmga002.fm.intel.com> X-Gm-Message-State: ALoCoQlukGJHqV3I84lmXkJlZkBb57plQjUHedDTp/bk0pDRR+Xek4qhmgGVcrKShk5DSdrRzfhM Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH] drm/i915: implement WaIssueDummyWriteToWakeupFromRC6 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Or at least our best understanding of it. Reviewed-by: Chris Wilson Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/i915_drv.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index a7837e5..c3f4f04 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -1131,9 +1131,20 @@ static bool IS_DISPLAYREG(u32 reg) return true; } +static void +ilk_dummy_write(struct drm_i915_private *dev_priv) +{ + /* Ilk w/a: Issue a dummy write to wake up the chip from rc6 before + * touching it for real. MI_MODE is masked, hence harmless to write 0 + * into. */ + I915_WRITE_NOTRACE(MI_MODE, 0); +} + #define __i915_read(x, y) \ u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg) { \ u##x val = 0; \ + if (IS_GEN5(dev_priv->dev)) \ + ilk_dummy_write(dev_priv); \ if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \ unsigned long irqflags; \ spin_lock_irqsave(&dev_priv->gt_lock, irqflags); \ @@ -1165,6 +1176,8 @@ void i915_write##x(struct drm_i915_private *dev_priv, u32 reg, u##x val) { \ if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \ __fifo_ret = __gen6_gt_wait_for_fifo(dev_priv); \ } \ + if (IS_GEN5(dev_priv->dev)) \ + ilk_dummy_write(dev_priv); \ if (IS_VALLEYVIEW(dev_priv->dev) && IS_DISPLAYREG(reg)) { \ write##y(val, dev_priv->regs + reg + 0x180000); \ } else { \