From patchwork Sun Oct 21 14:44:02 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 1622641 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id D4702DFFF1 for ; Sun, 21 Oct 2012 14:46:07 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 364AD9EDAC for ; Sun, 21 Oct 2012 07:46:07 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from fireflyinternet.com (smtp.fireflyinternet.com [109.228.6.236]) by gabe.freedesktop.org (Postfix) with ESMTP id 2E0F09E843 for ; Sun, 21 Oct 2012 07:45:46 -0700 (PDT) X-Default-Received-SPF: pass (skip=forwardok (res=PASS)) x-ip-name=78.156.73.22; Received: from arrandale.alporthouse.com (unverified [78.156.73.22]) by fireflyinternet.com (Firefly Internet SMTP) with ESMTP id 124781956-1500050 for multiple; Sun, 21 Oct 2012 15:45:21 +0100 From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Sun, 21 Oct 2012 15:44:02 +0100 Message-Id: <1350830642-10923-1-git-send-email-chris@chris-wilson.co.uk> X-Mailer: git-send-email 1.7.10.4 X-Originating-IP: 78.156.73.22 Cc: Daniel Vetter , Ben Widawsky , stable@vger.kernel.org Subject: [Intel-gfx] [PATCH] drm/i915: Revert RPS UP_EI value for SandyBridge and IvyBridge X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Even though we do not use the EI mode for determining when to change GPU frequencies for RPS, changing this value causes no up interrupts to be generated whilst an OpenGL client runs. Fixes regression from commit 1ee9ae3244c4789f3184c5123f3b2d7e405b3f4c Author: Daniel Vetter Date: Wed Aug 15 10:41:45 2012 +0200 drm/i915: use hsw rps tuning values everywhere on gen6+ Reported-by: Eric Anholt Signed-off-by: Chris Wilson Cc: Eric Anholt Cc: Ben Widawsky Cc: Daniel Vetter Cc: stable@vger.kernel.org --- drivers/gpu/drm/i915/intel_pm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 81e88c2..15b585e 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -2493,7 +2493,7 @@ static void gen6_enable_rps(struct drm_device *dev) I915_WRITE(GEN6_RP_UP_THRESHOLD, 59400); I915_WRITE(GEN6_RP_DOWN_THRESHOLD, 245000); - I915_WRITE(GEN6_RP_UP_EI, 66000); + I915_WRITE(GEN6_RP_UP_EI, IS_HASWELL(dev) ? 66000 : 100000); I915_WRITE(GEN6_RP_DOWN_EI, 350000); I915_WRITE(GEN6_RP_IDLE_HYSTERSIS, 10);