From patchwork Thu Oct 25 19:15:48 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jesse Barnes X-Patchwork-Id: 1647231 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id 48F46DF2AB for ; Thu, 25 Oct 2012 19:21:47 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 29E90A0A83 for ; Thu, 25 Oct 2012 12:21:47 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from oproxy7-pub.bluehost.com (oproxy7-pub.bluehost.com [67.222.55.9]) by gabe.freedesktop.org (Postfix) with SMTP id 651E4A0A6F for ; Thu, 25 Oct 2012 12:15:53 -0700 (PDT) Received: (qmail 6022 invoked by uid 0); 25 Oct 2012 19:15:52 -0000 Received: from unknown (HELO box514.bluehost.com) (74.220.219.114) by oproxy7.bluehost.com with SMTP; 25 Oct 2012 19:15:52 -0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=virtuousgeek.org; s=default; h=References:In-Reply-To:Message-Id:Date:Subject:To:From; bh=OR7uNopsvTw9NpJ4j8jCPJJioZtbb9RyNx51gKZBw94=; b=H2QEDlaVaCn5h9ag+efaZCIOwIpeUuxQHYoVUezXG1n1ObU0RJsc1xe0sg+g1lEzPRk71oqlhq5dIexTYmWQsdRvt7LYyN+RDGEB1oEqfLAM6GbPfwn3X4sSaRj3Cx4F; Received: from [67.161.37.189] (port=50070 helo=localhost.localdomain) by box514.bluehost.com with esmtpsa (TLSv1:AES256-SHA:256) (Exim 4.76) (envelope-from ) id 1TRSuG-0000wA-K9 for intel-gfx@lists.freedesktop.org; Thu, 25 Oct 2012 13:15:52 -0600 From: Jesse Barnes To: intel-gfx@lists.freedesktop.org Date: Thu, 25 Oct 2012 12:15:48 -0700 Message-Id: <1351192548-2992-8-git-send-email-jbarnes@virtuousgeek.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1351192548-2992-1-git-send-email-jbarnes@virtuousgeek.org> References: <1351192548-2992-1-git-send-email-jbarnes@virtuousgeek.org> X-Identified-User: {10642:box514.bluehost.com:virtuous:virtuousgeek.org} {sentby:smtp auth 67.161.37.189 authed with jbarnes@virtuousgeek.org} Subject: [Intel-gfx] [PATCH 8/8] drm/i915: add clock gating regs to VLV offset check function X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org So we can write them properly. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_drv.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index d4b3507..fb4b816 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -1129,8 +1129,17 @@ static bool IS_DISPLAYREG(u32 reg) return false; switch (reg) { + case _3D_CHICKEN3: + case IVB_CHICKEN3: + case GEN7_COMMON_SLICE_CHICKEN1: + case GEN7_L3CNTLREG1: + case GEN7_L3_CHICKEN_MODE_REGISTER: case GEN7_ROW_CHICKEN2: + case GEN7_L3SQCREG4: + case GEN7_SQ_CHICKEN_MBCUNIT_CONFIG: case GEN7_HALF_SLICE_CHICKEN1: + case GEN6_MBCTL: + case GEN6_UCGCTL2: return false; default: break;