From patchwork Fri Oct 26 08:58:17 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 1650731 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id B55BFDF2F6 for ; Fri, 26 Oct 2012 09:52:58 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8C84F9E831 for ; Fri, 26 Oct 2012 02:52:58 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-we0-f177.google.com (mail-we0-f177.google.com [74.125.82.177]) by gabe.freedesktop.org (Postfix) with ESMTP id EB0369E91F for ; Fri, 26 Oct 2012 01:58:31 -0700 (PDT) Received: by mail-we0-f177.google.com with SMTP id u50so1276810wey.36 for ; Fri, 26 Oct 2012 01:58:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=eDmtBV0Z09rw2wcWBL+j7u9+hUiM2slh4G4ojZSqQmI=; b=HrAOpio+x39x1FsXoAy30XgKtdn1eBnW/FmGTCV4TTMFUH1U+Rr6mz1btGpE6oYiwV +gzILZXbwAlWVlhVxZZmYxLsbiC6shOsEsLCAGCj8Ee2EdUS3E591cpd5NmCWo88hngx lgqNDLJ5pvtqgnJJJ9aESzqHfNti7d5o2E3Vg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=eDmtBV0Z09rw2wcWBL+j7u9+hUiM2slh4G4ojZSqQmI=; b=TKOxfQTR4kIx6wpCWxS/aNwxT42MGbj8lQMnFxWbpmvFkdOHlJRrCdETthNpbX1T1r +k/iLzgedia8nizOMxdSknk4Qx0Cl3gFKVXiQAQ1eUQhu6k9WpoF5JZ6SyVUCjKrmcSI N08ZyRWJZ4qOHB/m+wPhLf6/sdF5d76yKk0I+4HyK9R8rRllqwC62gYWTrSI0glavl95 SFPu7zfXtE5s4yqLm9iOsOTYJdTKJLJRBGNiCO72oXlxSzPgAxZbYKD86ZlHKNqCs3l+ AmoEZ/b7ym8BiXFF/CEZoRvYSuOLHvO4Ylpl+mY2dLiWl0G/7TysWJdHQro1o97xDioU M/Ow== Received: by 10.216.207.18 with SMTP id m18mr12442586weo.203.1351241910695; Fri, 26 Oct 2012 01:58:30 -0700 (PDT) Received: from bremse.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id k20sm14217364wiv.11.2012.10.26.01.58.30 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 26 Oct 2012 01:58:30 -0700 (PDT) From: Daniel Vetter To: Intel Graphics Development Date: Fri, 26 Oct 2012 10:58:17 +0200 Message-Id: <1351241899-7870-8-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.11.4 In-Reply-To: <1351241899-7870-1-git-send-email-daniel.vetter@ffwll.ch> References: <1351241899-7870-1-git-send-email-daniel.vetter@ffwll.ch> X-Gm-Message-State: ALoCoQmeEiWnBm2z6DaVib4N697NUU91EBt4FUpXgz3MmZApVEZxy0kXg+1FGP/8oOwWMtZF8TIt Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 7/9] drm/i915: drop unnecessary check from fdi_link_train code X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org They are all written for a specific north disaplay->pch combination. So stop pretending otherwise. Signed-off-by: Daniel Vetter Reviewed-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_display.c | 14 +++++--------- 1 file changed, 5 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 991adc1..7a9cfc2 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -2367,11 +2367,9 @@ static void ironlake_fdi_link_train(struct drm_crtc *crtc) udelay(150); /* Ironlake workaround, enable clock pointer after FDI enable*/ - if (HAS_PCH_IBX(dev)) { - I915_WRITE(FDI_RX_CHICKEN(pipe), FDI_RX_PHASE_SYNC_POINTER_OVR); - I915_WRITE(FDI_RX_CHICKEN(pipe), FDI_RX_PHASE_SYNC_POINTER_OVR | - FDI_RX_PHASE_SYNC_POINTER_EN); - } + I915_WRITE(FDI_RX_CHICKEN(pipe), FDI_RX_PHASE_SYNC_POINTER_OVR); + I915_WRITE(FDI_RX_CHICKEN(pipe), FDI_RX_PHASE_SYNC_POINTER_OVR | + FDI_RX_PHASE_SYNC_POINTER_EN); reg = FDI_RX_IIR(pipe); for (tries = 0; tries < 5; tries++) { @@ -2477,8 +2475,7 @@ static void gen6_fdi_link_train(struct drm_crtc *crtc) POSTING_READ(reg); udelay(150); - if (HAS_PCH_CPT(dev)) - cpt_phase_pointer_enable(dev, pipe); + cpt_phase_pointer_enable(dev, pipe); for (i = 0; i < 4; i++) { reg = FDI_TX_CTL(pipe); @@ -2609,8 +2606,7 @@ static void ivb_manual_fdi_link_train(struct drm_crtc *crtc) POSTING_READ(reg); udelay(150); - if (HAS_PCH_CPT(dev)) - cpt_phase_pointer_enable(dev, pipe); + cpt_phase_pointer_enable(dev, pipe); for (i = 0; i < 4; i++) { reg = FDI_TX_CTL(pipe);