diff mbox

drm/i915/ringbuffer: exclude last 2 cachelines on 845g on all callpaths

Message ID 1351522766-2719-1-git-send-email-mika.kuoppala@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Mika Kuoppala Oct. 29, 2012, 2:59 p.m. UTC
Make intel_render_ring_init_dri and intel_init_ring_buffer symmetrical
with regards of workaround introduced by:

commit 27c1cbd06a7620b354cbb363834f3bb8df4f410d
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date:   Mon Apr 9 13:59:46 2012 +0100

    drm/i915/ringbuffer: Exclude last 2 cachlines of ring on 845g

Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
---
 drivers/gpu/drm/i915/intel_ringbuffer.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Daniel Vetter Oct. 30, 2012, 11:54 p.m. UTC | #1
On Mon, Oct 29, 2012 at 04:59:26PM +0200, Mika Kuoppala wrote:
> Make intel_render_ring_init_dri and intel_init_ring_buffer symmetrical
> with regards of workaround introduced by:
> 
> commit 27c1cbd06a7620b354cbb363834f3bb8df4f410d
> Author: Chris Wilson <chris@chris-wilson.co.uk>
> Date:   Mon Apr 9 13:59:46 2012 +0100
> 
>     drm/i915/ringbuffer: Exclude last 2 cachlines of ring on 845g
> 
> Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Queued for -next, thanks for the patch.
-Daniel
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 785df4f..b13393b 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1590,7 +1590,7 @@  int intel_render_ring_init_dri(struct drm_device *dev, u64 start, u32 size)
 
 	ring->size = size;
 	ring->effective_size = ring->size;
-	if (IS_I830(ring->dev))
+	if (IS_I830(ring->dev) || IS_845G(ring->dev))
 		ring->effective_size -= 128;
 
 	ring->virtual_start = ioremap_wc(start, size);