diff mbox

[02/11] drm/i915: Add SURFLIVE register definitions

Message ID 1351698624-26626-3-git-send-email-ville.syrjala@linux.intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Ville Syrjala Oct. 31, 2012, 3:50 p.m. UTC
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h |    7 +++++++
 1 files changed, 7 insertions(+), 0 deletions(-)

Comments

Jesse Barnes Oct. 31, 2012, 8:23 p.m. UTC | #1
On Wed, 31 Oct 2012 17:50:15 +0200
ville.syrjala@linux.intel.com wrote:

> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_reg.h |    7 +++++++
>  1 files changed, 7 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index da8400a..2555986 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -3041,6 +3041,7 @@
>  #define _DSPASIZE		0x70190
>  #define _DSPASURF		0x7019C /* 965+ only */
>  #define _DSPATILEOFF		0x701A4 /* 965+ only */
> +#define _DSPASURFLIVE		0x701AC
>  
>  #define DSPCNTR(plane) _PIPE(plane, _DSPACNTR, _DSPBCNTR)
>  #define DSPADDR(plane) _PIPE(plane, _DSPAADDR, _DSPBADDR)
> @@ -3050,6 +3051,7 @@
>  #define DSPSURF(plane) _PIPE(plane, _DSPASURF, _DSPBSURF)
>  #define DSPTILEOFF(plane) _PIPE(plane, _DSPATILEOFF, _DSPBTILEOFF)
>  #define DSPLINOFF(plane) DSPADDR(plane)
> +#define DSPSURFLIVE(plane) _PIPE(plane, _DSPASURFLIVE, _DSPBSURFLIVE)
>  
>  /* Display/Sprite base address macros */
>  #define DISP_BASEADDR_MASK	(0xfffff000)
> @@ -3095,6 +3097,7 @@
>  #define _DSPBSIZE		0x71190
>  #define _DSPBSURF		0x7119C
>  #define _DSPBTILEOFF		0x711A4
> +#define _DSPBSURFLIVE		0x711AC
>  
>  /* Sprite A control */
>  #define _DVSACNTR		0x72180
> @@ -3160,6 +3163,7 @@
>  #define DVSTILEOFF(pipe) _PIPE(pipe, _DVSATILEOFF, _DVSBTILEOFF)
>  #define DVSKEYVAL(pipe) _PIPE(pipe, _DVSAKEYVAL, _DVSBKEYVAL)
>  #define DVSKEYMSK(pipe) _PIPE(pipe, _DVSAKEYMSK, _DVSBKEYMSK)
> +#define DVSSURFLIVE(pipe) _PIPE(pipe, _DVSASURFLIVE, _DVSBSURFLIVE)
>  
>  #define _SPRA_CTL		0x70280
>  #define   SPRITE_ENABLE			(1<<31)
> @@ -3194,6 +3198,7 @@
>  #define _SPRA_SURF		0x7029c
>  #define _SPRA_KEYMAX		0x702a0
>  #define _SPRA_TILEOFF		0x702a4
> +#define _SPRA_SURFLIVE		0x702ac
>  #define _SPRA_SCALE		0x70304
>  #define   SPRITE_SCALE_ENABLE	(1<<31)
>  #define   SPRITE_FILTER_MASK	(3<<29)
> @@ -3214,6 +3219,7 @@
>  #define _SPRB_SURF		0x7129c
>  #define _SPRB_KEYMAX		0x712a0
>  #define _SPRB_TILEOFF		0x712a4
> +#define _SPRB_SURFLIVE		0x712ac
>  #define _SPRB_SCALE		0x71304
>  #define _SPRB_GAMC		0x71400
>  
> @@ -3229,6 +3235,7 @@
>  #define SPRTILEOFF(pipe) _PIPE(pipe, _SPRA_TILEOFF, _SPRB_TILEOFF)
>  #define SPRSCALE(pipe) _PIPE(pipe, _SPRA_SCALE, _SPRB_SCALE)
>  #define SPRGAMC(pipe) _PIPE(pipe, _SPRA_GAMC, _SPRB_GAMC)
> +#define SPRSURFLIVE(pipe) _PIPE(pipe, _SPRA_SURFLIVE, _SPRB_SURFLIVE)
>  
>  /* VBIOS regs */
>  #define VGACNTRL		0x71400

Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Daniel Vetter Oct. 31, 2012, 10:57 p.m. UTC | #2
On Wed, Oct 31, 2012 at 01:23:05PM -0700, Jesse Barnes wrote:
> On Wed, 31 Oct 2012 17:50:15 +0200
> ville.syrjala@linux.intel.com wrote:
> 
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Fails to apply here somehow. Also, this thing is base64 encoded, which
confused my normal workflow for a bit ... Dunno what exactly caused this
havoc.
-Daniel

> > ---
> >  drivers/gpu/drm/i915/i915_reg.h |    7 +++++++
> >  1 files changed, 7 insertions(+), 0 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index da8400a..2555986 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -3041,6 +3041,7 @@
> >  #define _DSPASIZE		0x70190
> >  #define _DSPASURF		0x7019C /* 965+ only */
> >  #define _DSPATILEOFF		0x701A4 /* 965+ only */
> > +#define _DSPASURFLIVE		0x701AC
> >  
> >  #define DSPCNTR(plane) _PIPE(plane, _DSPACNTR, _DSPBCNTR)
> >  #define DSPADDR(plane) _PIPE(plane, _DSPAADDR, _DSPBADDR)
> > @@ -3050,6 +3051,7 @@
> >  #define DSPSURF(plane) _PIPE(plane, _DSPASURF, _DSPBSURF)
> >  #define DSPTILEOFF(plane) _PIPE(plane, _DSPATILEOFF, _DSPBTILEOFF)
> >  #define DSPLINOFF(plane) DSPADDR(plane)
> > +#define DSPSURFLIVE(plane) _PIPE(plane, _DSPASURFLIVE, _DSPBSURFLIVE)
> >  
> >  /* Display/Sprite base address macros */
> >  #define DISP_BASEADDR_MASK	(0xfffff000)
> > @@ -3095,6 +3097,7 @@
> >  #define _DSPBSIZE		0x71190
> >  #define _DSPBSURF		0x7119C
> >  #define _DSPBTILEOFF		0x711A4
> > +#define _DSPBSURFLIVE		0x711AC
> >  
> >  /* Sprite A control */
> >  #define _DVSACNTR		0x72180
> > @@ -3160,6 +3163,7 @@
> >  #define DVSTILEOFF(pipe) _PIPE(pipe, _DVSATILEOFF, _DVSBTILEOFF)
> >  #define DVSKEYVAL(pipe) _PIPE(pipe, _DVSAKEYVAL, _DVSBKEYVAL)
> >  #define DVSKEYMSK(pipe) _PIPE(pipe, _DVSAKEYMSK, _DVSBKEYMSK)
> > +#define DVSSURFLIVE(pipe) _PIPE(pipe, _DVSASURFLIVE, _DVSBSURFLIVE)
> >  
> >  #define _SPRA_CTL		0x70280
> >  #define   SPRITE_ENABLE			(1<<31)
> > @@ -3194,6 +3198,7 @@
> >  #define _SPRA_SURF		0x7029c
> >  #define _SPRA_KEYMAX		0x702a0
> >  #define _SPRA_TILEOFF		0x702a4
> > +#define _SPRA_SURFLIVE		0x702ac
> >  #define _SPRA_SCALE		0x70304
> >  #define   SPRITE_SCALE_ENABLE	(1<<31)
> >  #define   SPRITE_FILTER_MASK	(3<<29)
> > @@ -3214,6 +3219,7 @@
> >  #define _SPRB_SURF		0x7129c
> >  #define _SPRB_KEYMAX		0x712a0
> >  #define _SPRB_TILEOFF		0x712a4
> > +#define _SPRB_SURFLIVE		0x712ac
> >  #define _SPRB_SCALE		0x71304
> >  #define _SPRB_GAMC		0x71400
> >  
> > @@ -3229,6 +3235,7 @@
> >  #define SPRTILEOFF(pipe) _PIPE(pipe, _SPRA_TILEOFF, _SPRB_TILEOFF)
> >  #define SPRSCALE(pipe) _PIPE(pipe, _SPRA_SCALE, _SPRB_SCALE)
> >  #define SPRGAMC(pipe) _PIPE(pipe, _SPRA_GAMC, _SPRB_GAMC)
> > +#define SPRSURFLIVE(pipe) _PIPE(pipe, _SPRA_SURFLIVE, _SPRB_SURFLIVE)
> >  
> >  /* VBIOS regs */
> >  #define VGACNTRL		0x71400
> 
> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> 
> -- 
> Jesse Barnes, Intel Open Source Technology Center
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Ville Syrjala Nov. 1, 2012, 2:16 p.m. UTC | #3
On Wed, Oct 31, 2012 at 11:57:00PM +0100, Daniel Vetter wrote:
> On Wed, Oct 31, 2012 at 01:23:05PM -0700, Jesse Barnes wrote:
> > On Wed, 31 Oct 2012 17:50:15 +0200
> > ville.syrjala@linux.intel.com wrote:
> > 
> > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > 
> > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Fails to apply here somehow. Also, this thing is base64 encoded, which
> confused my normal workflow for a bit ... Dunno what exactly caused this
> havoc.

Strange. I had it sitting on top of drm-intel-next when I sent it.

The whole series seems to be base64 after I got it back from the list.
Maybe it's out wonderful mail system trying to do something clever.
Base64 itself shouldn't disturb git-am & co.
Daniel Vetter Nov. 1, 2012, 2:19 p.m. UTC | #4
On Thu, Nov 1, 2012 at 3:16 PM, Ville Syrjälä
<ville.syrjala@linux.intel.com> wrote:
> On Wed, Oct 31, 2012 at 11:57:00PM +0100, Daniel Vetter wrote:
>> On Wed, Oct 31, 2012 at 01:23:05PM -0700, Jesse Barnes wrote:
>> > On Wed, 31 Oct 2012 17:50:15 +0200
>> > ville.syrjala@linux.intel.com wrote:
>> >
>> > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> > >
>> > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>
>> Fails to apply here somehow. Also, this thing is base64 encoded, which
>> confused my normal workflow for a bit ... Dunno what exactly caused this
>> havoc.
>
> Strange. I had it sitting on top of drm-intel-next when I sent it.
>
> The whole series seems to be base64 after I got it back from the list.
> Maybe it's out wonderful mail system trying to do something clever.
> Base64 itself shouldn't disturb git-am & co.

Yeah, git am coped fine, but patch was a bit upset. I've then feed it
the decoded text/plain part, which resulted in some strange conflicts.
Dunno what has happened there. Can you simply resend a new patch
rebased on top of latest dinq?

Thanks, Daniel
Ville Syrjala Nov. 1, 2012, 2:23 p.m. UTC | #5
On Thu, Nov 01, 2012 at 03:19:34PM +0100, Daniel Vetter wrote:
> On Thu, Nov 1, 2012 at 3:16 PM, Ville Syrjälä
> <ville.syrjala@linux.intel.com> wrote:
> > On Wed, Oct 31, 2012 at 11:57:00PM +0100, Daniel Vetter wrote:
> >> On Wed, Oct 31, 2012 at 01:23:05PM -0700, Jesse Barnes wrote:
> >> > On Wed, 31 Oct 2012 17:50:15 +0200
> >> > ville.syrjala@linux.intel.com wrote:
> >> >
> >> > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >> > >
> >> > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >>
> >> Fails to apply here somehow. Also, this thing is base64 encoded, which
> >> confused my normal workflow for a bit ... Dunno what exactly caused this
> >> havoc.
> >
> > Strange. I had it sitting on top of drm-intel-next when I sent it.
> >
> > The whole series seems to be base64 after I got it back from the list.
> > Maybe it's out wonderful mail system trying to do something clever.
> > Base64 itself shouldn't disturb git-am & co.
> 
> Yeah, git am coped fine, but patch was a bit upset. I've then feed it
> the decoded text/plain part, which resulted in some strange conflicts.
> Dunno what has happened there. Can you simply resend a new patch
> rebased on top of latest dinq?

Will do.
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index da8400a..2555986 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3041,6 +3041,7 @@ 
 #define _DSPASIZE		0x70190
 #define _DSPASURF		0x7019C /* 965+ only */
 #define _DSPATILEOFF		0x701A4 /* 965+ only */
+#define _DSPASURFLIVE		0x701AC
 
 #define DSPCNTR(plane) _PIPE(plane, _DSPACNTR, _DSPBCNTR)
 #define DSPADDR(plane) _PIPE(plane, _DSPAADDR, _DSPBADDR)
@@ -3050,6 +3051,7 @@ 
 #define DSPSURF(plane) _PIPE(plane, _DSPASURF, _DSPBSURF)
 #define DSPTILEOFF(plane) _PIPE(plane, _DSPATILEOFF, _DSPBTILEOFF)
 #define DSPLINOFF(plane) DSPADDR(plane)
+#define DSPSURFLIVE(plane) _PIPE(plane, _DSPASURFLIVE, _DSPBSURFLIVE)
 
 /* Display/Sprite base address macros */
 #define DISP_BASEADDR_MASK	(0xfffff000)
@@ -3095,6 +3097,7 @@ 
 #define _DSPBSIZE		0x71190
 #define _DSPBSURF		0x7119C
 #define _DSPBTILEOFF		0x711A4
+#define _DSPBSURFLIVE		0x711AC
 
 /* Sprite A control */
 #define _DVSACNTR		0x72180
@@ -3160,6 +3163,7 @@ 
 #define DVSTILEOFF(pipe) _PIPE(pipe, _DVSATILEOFF, _DVSBTILEOFF)
 #define DVSKEYVAL(pipe) _PIPE(pipe, _DVSAKEYVAL, _DVSBKEYVAL)
 #define DVSKEYMSK(pipe) _PIPE(pipe, _DVSAKEYMSK, _DVSBKEYMSK)
+#define DVSSURFLIVE(pipe) _PIPE(pipe, _DVSASURFLIVE, _DVSBSURFLIVE)
 
 #define _SPRA_CTL		0x70280
 #define   SPRITE_ENABLE			(1<<31)
@@ -3194,6 +3198,7 @@ 
 #define _SPRA_SURF		0x7029c
 #define _SPRA_KEYMAX		0x702a0
 #define _SPRA_TILEOFF		0x702a4
+#define _SPRA_SURFLIVE		0x702ac
 #define _SPRA_SCALE		0x70304
 #define   SPRITE_SCALE_ENABLE	(1<<31)
 #define   SPRITE_FILTER_MASK	(3<<29)
@@ -3214,6 +3219,7 @@ 
 #define _SPRB_SURF		0x7129c
 #define _SPRB_KEYMAX		0x712a0
 #define _SPRB_TILEOFF		0x712a4
+#define _SPRB_SURFLIVE		0x712ac
 #define _SPRB_SCALE		0x71304
 #define _SPRB_GAMC		0x71400
 
@@ -3229,6 +3235,7 @@ 
 #define SPRTILEOFF(pipe) _PIPE(pipe, _SPRA_TILEOFF, _SPRB_TILEOFF)
 #define SPRSCALE(pipe) _PIPE(pipe, _SPRA_SCALE, _SPRB_SCALE)
 #define SPRGAMC(pipe) _PIPE(pipe, _SPRA_GAMC, _SPRB_GAMC)
+#define SPRSURFLIVE(pipe) _PIPE(pipe, _SPRA_SURFLIVE, _SPRB_SURFLIVE)
 
 /* VBIOS regs */
 #define VGACNTRL		0x71400