From patchwork Wed Oct 31 20:12:36 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paulo Zanoni X-Patchwork-Id: 1681421 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id 8BBA24005F for ; Wed, 31 Oct 2012 20:22:49 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7876DA08EC for ; Wed, 31 Oct 2012 13:22:49 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-ye0-f177.google.com (mail-ye0-f177.google.com [209.85.213.177]) by gabe.freedesktop.org (Postfix) with ESMTP id 2AEAEA0BF7 for ; Wed, 31 Oct 2012 13:13:39 -0700 (PDT) Received: by mail-ye0-f177.google.com with SMTP id r1so354583yen.36 for ; Wed, 31 Oct 2012 13:13:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=z9mNvGh0VlYr2KO3VpUmHK6KEe9JCE7Eurf3oj+KTQY=; b=g7j6sGECO0QbTct86Ba3b4rUW7WBLWfN3Vn18B5WKkjzxz6mCO2sQoTdZMWGJk0TWw H+HRzu5Kll/WO390/ZBb1/J50X4fjBta9+9asFSGxXD/XzQsdJ6uYokZMC0mIGqr26QQ tfXD26M1uBWM1BDeNW+dM1CoqYFHIlR1LR6zTTdB7bcHWiE5Ue8niabmR2FWgJy4C1z5 Gkyya93IJ6VhEBtwJwZAbxztH8fKFWRcCC8TCSR0mhsC4KwParTplzLN+QD9NAi8Fh1e bMsEdtmxM9MdVTXHweYBwin2lO11gU0sLbHBT7Gpj/7CJv+6oYuXWwAi8b1SDzM/nq82 wnyw== Received: by 10.236.141.81 with SMTP id f57mr38214129yhj.13.1351714418988; Wed, 31 Oct 2012 13:13:38 -0700 (PDT) Received: from vicky.domain.invalid ([177.42.7.91]) by mx.google.com with ESMTPS id h16sm4354130ani.0.2012.10.31.13.13.37 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 31 Oct 2012 13:13:38 -0700 (PDT) From: Paulo Zanoni To: intel-gfx@lists.freedesktop.org Date: Wed, 31 Oct 2012 18:12:36 -0200 Message-Id: <1351714375-15284-18-git-send-email-przanoni@gmail.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1351714375-15284-1-git-send-email-przanoni@gmail.com> References: <1351714375-15284-1-git-send-email-przanoni@gmail.com> Cc: Paulo Zanoni Subject: [Intel-gfx] [PATCH 17/36] drm/i915: fix Haswell FDI link disable path X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org From: Paulo Zanoni This covers the "Disable FDI" section from the CRT mode set sequence. This disables the FDI receiver and also the FDI pll. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_ddi.c | 26 ++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_display.c | 3 +-- drivers/gpu/drm/i915/intel_drv.h | 4 +++- 3 files changed, 30 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 94c6b76..21dfc8a 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -1363,6 +1363,32 @@ void intel_ddi_prepare_link_retrain(struct drm_encoder *encoder) udelay(600); } +void intel_ddi_fdi_disable(struct drm_crtc *crtc) +{ + struct drm_i915_private *dev_priv = crtc->dev->dev_private; + struct intel_encoder *intel_encoder = intel_ddi_get_crtc_encoder(crtc); + uint32_t val; + + intel_ddi_post_disable(intel_encoder); + + val = I915_READ(_FDI_RXA_CTL); + val &= ~FDI_RX_ENABLE; + I915_WRITE(_FDI_RXA_CTL, val); + + val = I915_READ(_FDI_RXA_MISC); + val &= ~(FDI_RX_PWRDN_LANE1_MASK | FDI_RX_PWRDN_LANE0_MASK); + val |= FDI_RX_PWRDN_LANE1_VAL(2) | FDI_RX_PWRDN_LANE0_VAL(2); + I915_WRITE(_FDI_RXA_MISC, val); + + val = I915_READ(_FDI_RXA_CTL); + val &= ~FDI_PCDCLK; + I915_WRITE(_FDI_RXA_CTL, val); + + val = I915_READ(_FDI_RXA_CTL); + val &= ~FDI_RX_PLL_ENABLE; + I915_WRITE(_FDI_RXA_CTL, val); +} + static void intel_ddi_hot_plug(struct intel_encoder *intel_encoder) { struct intel_dp *intel_dp = enc_to_intel_dp(&intel_encoder->base); diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index e0b1f8c..ee81932 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3563,10 +3563,9 @@ static void haswell_crtc_disable(struct drm_crtc *crtc) encoder->post_disable(encoder); if (is_pch_port) { - ironlake_fdi_disable(crtc); intel_disable_transcoder(dev_priv, pipe); intel_disable_pch_pll(intel_crtc); - ironlake_fdi_pll_disable(intel_crtc); + intel_ddi_fdi_disable(crtc); } intel_crtc->active = false; diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 08238ef..bcc5241 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -662,6 +662,8 @@ extern bool intel_ddi_pll_mode_set(struct drm_crtc *crtc, int clock); extern void intel_ddi_put_crtc_pll(struct drm_crtc *crtc); extern void intel_ddi_set_pipe_settings(struct drm_crtc *crtc); extern void intel_ddi_prepare_link_retrain(struct drm_encoder *encoder); -bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector); +extern bool +intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector); +extern void intel_ddi_fdi_disable(struct drm_crtc *crtc); #endif /* __INTEL_DRV_H__ */