From patchwork Wed Oct 31 20:12:54 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paulo Zanoni X-Patchwork-Id: 1681631 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id 6E5B0DFB80 for ; Wed, 31 Oct 2012 20:33:32 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 53C66A0B6E for ; Wed, 31 Oct 2012 13:33:32 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-gg0-f177.google.com (mail-gg0-f177.google.com [209.85.161.177]) by gabe.freedesktop.org (Postfix) with ESMTP id DB5C8A08EC for ; Wed, 31 Oct 2012 13:14:07 -0700 (PDT) Received: by mail-gg0-f177.google.com with SMTP id h1so348839gge.36 for ; Wed, 31 Oct 2012 13:14:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=w83eeJq2PnYdqN/7F2y7wwWczDT4PeCg2uvaDm2XIjM=; b=KwGq58jTSUWHcdGer0MHvnMuXXiVthe9tiGzoPWs9td+mDd6dvxsGeRV21STGOPAtG o3cwkkemVt6XsmFH9eI5PsBfuvKYFq/Hn2XkM0TSqdC6MPnrQUrACTdcaLIArqzcLCcO DY2ViH0efEs0Q4xz8KUUP+uKtBBQgZmCQdThfqCWGcLqt9AwD0ZNmIKxkItW5a1NA15z 8QZ7bsF9OlDh3M65Oal4YArE+MQOmvJBVHLfHA9X4p87pWtPgzdUeG9bYvv0Kfa5Q/rG TR5KK+SqkcI3yqK388gcJoNhWzTzh2hCurgF4OaUzl1huqkk2M0AD8yDTe2+AAsZjWNz Sr+Q== Received: by 10.236.135.75 with SMTP id t51mr37054146yhi.105.1351714447709; Wed, 31 Oct 2012 13:14:07 -0700 (PDT) Received: from vicky.domain.invalid ([177.42.7.91]) by mx.google.com with ESMTPS id h16sm4354130ani.0.2012.10.31.13.14.06 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 31 Oct 2012 13:14:07 -0700 (PDT) From: Paulo Zanoni To: intel-gfx@lists.freedesktop.org Date: Wed, 31 Oct 2012 18:12:54 -0200 Message-Id: <1351714375-15284-36-git-send-email-przanoni@gmail.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1351714375-15284-1-git-send-email-przanoni@gmail.com> References: <1351714375-15284-1-git-send-email-przanoni@gmail.com> Cc: Paulo Zanoni Subject: [Intel-gfx] [PATCH 35/36] drm/i915: don't limit Haswell CRT encoder to pipe A X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org From: Paulo Zanoni This is a full revert of 59c859d6f2e78344945e8a8406a194156176bc4e: drm/i915: account for only one PCH receiver on Haswell Now that the PCH code is fixed to be able use the only PCH transcoder independently of the pipe and CPU transcoder, we can revert this. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_crt.c | 5 +---- drivers/gpu/drm/i915/intel_display.c | 15 +++------------ 2 files changed, 4 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c index 1c97c27..124fd78 100644 --- a/drivers/gpu/drm/i915/intel_crt.c +++ b/drivers/gpu/drm/i915/intel_crt.c @@ -764,10 +764,7 @@ void intel_crt_init(struct drm_device *dev) crt->base.type = INTEL_OUTPUT_ANALOG; crt->base.cloneable = true; - if (IS_HASWELL(dev)) - crt->base.crtc_mask = (1 << 0); - else - crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); + crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); if (IS_GEN2(dev)) connector->interlace_allowed = 0; diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 0119b3b..c495bfa 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1151,14 +1151,9 @@ static void assert_fdi_rx(struct drm_i915_private *dev_priv, u32 val; bool cur_state; - if (IS_HASWELL(dev_priv->dev) && pipe > 0) { - DRM_ERROR("Attempting to enable FDI_RX on Haswell pipe > 0\n"); - return; - } else { - reg = FDI_RX_CTL(pipe); - val = I915_READ(reg); - cur_state = !!(val & FDI_RX_ENABLE); - } + reg = FDI_RX_CTL(pipe); + val = I915_READ(reg); + cur_state = !!(val & FDI_RX_ENABLE); WARN(cur_state != state, "FDI RX state assertion failure (expected %s, current %s)\n", state_string(state), state_string(cur_state)); @@ -1191,10 +1186,6 @@ static void assert_fdi_rx_pll_enabled(struct drm_i915_private *dev_priv, int reg; u32 val; - if (IS_HASWELL(dev_priv->dev) && pipe > 0) { - DRM_ERROR("Attempting to enable FDI on Haswell with pipe > 0\n"); - return; - } reg = FDI_RX_CTL(pipe); val = I915_READ(reg); WARN(!(val & FDI_RX_PLL_ENABLE), "FDI RX PLL assertion failure, should be active but is disabled\n");