From patchwork Wed Oct 31 22:41:05 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jesse Barnes X-Patchwork-Id: 1682031 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id 340F0DFB80 for ; Wed, 31 Oct 2012 22:41:53 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1966AA0EB3 for ; Wed, 31 Oct 2012 15:41:53 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from oproxy11-pub.bluehost.com (oproxy11-pub.bluehost.com [173.254.64.10]) by gabe.freedesktop.org (Postfix) with SMTP id 9D885A0DC2 for ; Wed, 31 Oct 2012 15:41:10 -0700 (PDT) Received: (qmail 22456 invoked by uid 0); 31 Oct 2012 22:41:07 -0000 Received: from unknown (HELO box514.bluehost.com) (74.220.219.114) by oproxy11.bluehost.com with SMTP; 31 Oct 2012 22:41:07 -0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=virtuousgeek.org; s=default; h=References:In-Reply-To:Message-Id:Date:Subject:To:From; bh=G9UsOw6XYaBOQvQ79UyxvfpdS70+VN22AGm1hIohlHI=; b=hIpQ2kGXf88jKL51lst8tXv4OXotC+FpXUYlVnVnVmyFoKO2aKf+wbM5wYLf6U9ODPY8oLzPkF0w2ifsq8RgdH/wHTHNbnQNg4cxbgKC8y8q7QUBnzjjGHZZ+19LNZU8; Received: from [67.161.37.189] (port=45090 helo=localhost.localdomain) by box514.bluehost.com with esmtpsa (TLSv1:AES256-SHA:256) (Exim 4.76) (envelope-from ) id 1TTgyA-0003W0-Ug for intel-gfx@lists.freedesktop.org; Wed, 31 Oct 2012 16:41:07 -0600 From: Jesse Barnes To: intel-gfx@lists.freedesktop.org Date: Wed, 31 Oct 2012 15:41:05 -0700 Message-Id: <1351723265-4086-4-git-send-email-jbarnes@virtuousgeek.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1351723265-4086-1-git-send-email-jbarnes@virtuousgeek.org> References: <1351723265-4086-1-git-send-email-jbarnes@virtuousgeek.org> X-Identified-User: {10642:box514.bluehost.com:virtuous:virtuousgeek.org} {sentby:smtp auth 67.161.37.189 authed with jbarnes@virtuousgeek.org} Subject: [Intel-gfx] [PATCH 4/4] drm/i915: don't rewrite the GTT on resume v3 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org The BIOS shouldn't be touching this memory across suspend/resume, so just leave it alone. This saves us ~6ms on resume on my T420 (retested with write combined PTEs). v2: change gtt restore default on pre-gen4 (Chris) move needs_gtt_restore flag into dev_priv v3: make sure we restore GTT on resume from hibernate (Daniel) use opregion support as the cutoff for restore from resume (Chris) Signed-off-by: Jesse Barnes Reviewed-by: Chris Wilson --- drivers/gpu/drm/i915/i915_dma.c | 8 +++++++- drivers/gpu/drm/i915/i915_drv.c | 39 +++++++++++++++++++++++++++++---------- drivers/gpu/drm/i915/i915_drv.h | 2 ++ 3 files changed, 38 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index 1ce7e49..69ac4a5 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c @@ -1467,6 +1467,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) struct intel_device_info *info; int ret = 0, mmio_bar, mmio_size; uint32_t aperture_size; + bool opregion_supported = false; info = (struct intel_device_info *) flags; @@ -1592,7 +1593,12 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) /* Try to make sure MCHBAR is enabled before poking at it */ intel_setup_mchbar(dev); intel_setup_gmbus(dev); - intel_opregion_setup(dev); + if (!intel_opregion_setup(dev)) + opregion_supported = true; + + /* Gen3+ should have saner BIOSes (we hope) */ + if (!opregion_supported) + dev_priv->needs_gtt_restore = true; /* Make sure the bios did its job and set up vital registers */ intel_setup_bios(dev); diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 9feedb4..1ea70ec 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -533,19 +533,11 @@ void intel_console_resume(struct work_struct *work) console_unlock(); } -static int i915_drm_thaw(struct drm_device *dev) +static int __i915_drm_thaw(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; int error = 0; - intel_gt_reset(dev); - - if (drm_core_check_feature(dev, DRIVER_MODESET)) { - mutex_lock(&dev->struct_mutex); - i915_gem_restore_gtt_mappings(dev); - mutex_unlock(&dev->struct_mutex); - } - i915_restore_state(dev); intel_opregion_setup(dev); @@ -574,8 +566,26 @@ static int i915_drm_thaw(struct drm_device *dev) return error; } +static int i915_drm_thaw(struct drm_device *dev) +{ + int error = 0; + + intel_gt_reset(dev); + + if (drm_core_check_feature(dev, DRIVER_MODESET)) { + mutex_lock(&dev->struct_mutex); + i915_gem_restore_gtt_mappings(dev); + mutex_unlock(&dev->struct_mutex); + } + + __i915_drm_thaw(dev); + + return error; +} + int i915_resume(struct drm_device *dev) { + struct drm_i915_private *dev_priv = dev->dev_private; int ret; if (dev->switch_power_state == DRM_SWITCH_POWER_OFF) @@ -586,7 +596,16 @@ int i915_resume(struct drm_device *dev) pci_set_master(dev->pdev); - ret = i915_drm_thaw(dev); + intel_gt_reset(dev); + + if (drm_core_check_feature(dev, DRIVER_MODESET) && + dev_priv->needs_gtt_restore) { + mutex_lock(&dev->struct_mutex); + i915_gem_restore_gtt_mappings(dev); + mutex_unlock(&dev->struct_mutex); + } + + ret = __i915_drm_thaw(dev); if (ret) return ret; diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index b41a90b..df65e48 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -881,6 +881,8 @@ typedef struct drm_i915_private { struct delayed_work gen6_power_work; + bool needs_gtt_restore; + enum no_fbc_reason no_fbc_reason; struct drm_mm_node *compressed_fb;