From patchwork Wed Nov 14 16:14:03 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 1742591 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id A91E3DF264 for ; Wed, 14 Nov 2012 16:26:44 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 87B7FA0301 for ; Wed, 14 Nov 2012 08:26:44 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-ee0-f49.google.com (mail-ee0-f49.google.com [74.125.83.49]) by gabe.freedesktop.org (Postfix) with ESMTP id A0C20A02C5 for ; Wed, 14 Nov 2012 08:25:24 -0800 (PST) Received: by mail-ee0-f49.google.com with SMTP id c1so385161eek.36 for ; Wed, 14 Nov 2012 08:25:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=MR58tbGkEECII8a8LpKoNHS4N6FWTD/N5aguLM65lN4=; b=F2earjkOYwothyLT9yK701+YjzcgCMWoNcesgi95oH4Vy8aQQsqNFxo85MZG9OvkPT PLtsozR6HxxW+O9eFd+3cR69yem2A4vnhI8upwXaQzsXL+NrcIvY34GDULOnzCRLwXwq iKdF1PSF25nzKY2XQDOdFVxSh3KKqM6fbHQe4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=MR58tbGkEECII8a8LpKoNHS4N6FWTD/N5aguLM65lN4=; b=ecXRNUDpixr/oSNQTmy4x9ookRVH2GEUg0qdcbRvzEOadcpZz6pSTp/EM/zDbl2zic R8mY/y+S07GZ/fuWB4Q7+W1oI4e/yYPzTuut8+zvZnfcQR1Q8eMSIFkwaXW9+uPAf76x 69D2rYrGGJBisUDovSmB7OqKCedPcYahvpeYFOENqSApHNAJQoPU3yELovnro13ujVA+ pcwC540t23CksmHMY+FSlTOQyifcx1jWScSIiLzseQif2T7yVQLl1CH5k0gY655x5fo4 eY0RPrMHQiAFmEzTLQ/3lYoI6W392svgpPgXfMIpulanisxkWowbUtZQRJWTmOy9M56w TgsA== Received: by 10.14.220.71 with SMTP id n47mr88387553eep.26.1352910324174; Wed, 14 Nov 2012 08:25:24 -0800 (PST) Received: from fliege.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id b44sm30409682eep.12.2012.11.14.08.25.17 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 14 Nov 2012 08:25:21 -0800 (PST) From: Daniel Vetter To: Intel Graphics Development Date: Wed, 14 Nov 2012 17:14:03 +0100 Message-Id: <1352909648-21514-2-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.11.4 In-Reply-To: <1352909648-21514-1-git-send-email-daniel.vetter@ffwll.ch> References: <1352909648-21514-1-git-send-email-daniel.vetter@ffwll.ch> X-Gm-Message-State: ALoCoQlIdwMWFRKw+awGjvx27UR5G5DuSxlp28iqxwBNw4RnmPyeNfdbuGPvhuGfHcwGEEr+jQ4c Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 1/6] drm/i915: move dev_priv->mm out of line X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Tha one is really big, since it contains tons of comments explaining how things work. Which is nice ;-) Signed-off-by: Daniel Vetter Reviewed-by: Damien Lespiau --- drivers/gpu/drm/i915/i915_drv.h | 212 ++++++++++++++++++++-------------------- 1 file changed, 107 insertions(+), 105 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index db6d71c..1b0a464 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -612,6 +612,112 @@ struct intel_l3_parity { struct work_struct error_work; }; +struct i915_gem_mm { + /** Bridge to intel-gtt-ko */ + struct intel_gtt *gtt; + /** Memory allocator for GTT stolen memory */ + struct drm_mm stolen; + /** Memory allocator for GTT */ + struct drm_mm gtt_space; + /** List of all objects in gtt_space. Used to restore gtt + * mappings on resume */ + struct list_head bound_list; + /** + * List of objects which are not bound to the GTT (thus + * are idle and not used by the GPU) but still have + * (presumably uncached) pages still attached. + */ + struct list_head unbound_list; + + /** Usable portion of the GTT for GEM */ + unsigned long gtt_start; + unsigned long gtt_mappable_end; + unsigned long gtt_end; + + struct io_mapping *gtt_mapping; + phys_addr_t gtt_base_addr; + int gtt_mtrr; + + /** PPGTT used for aliasing the PPGTT with the GTT */ + struct i915_hw_ppgtt *aliasing_ppgtt; + + struct shrinker inactive_shrinker; + + /** + * List of objects currently involved in rendering. + * + * Includes buffers having the contents of their GPU caches + * flushed, not necessarily primitives. last_rendering_seqno + * represents when the rendering involved will be completed. + * + * A reference is held on the buffer while on this list. + */ + struct list_head active_list; + + /** + * LRU list of objects which are not in the ringbuffer and + * are ready to unbind, but are still in the GTT. + * + * last_rendering_seqno is 0 while an object is in this list. + * + * A reference is not held on the buffer while on this list, + * as merely being GTT-bound shouldn't prevent its being + * freed, and we'll pull it off the list in the free path. + */ + struct list_head inactive_list; + + /** LRU list of objects with fence regs on them. */ + struct list_head fence_list; + + /** + * We leave the user IRQ off as much as possible, + * but this means that requests will finish and never + * be retired once the system goes idle. Set a timer to + * fire periodically while the ring is running. When it + * fires, go retire requests. + */ + struct delayed_work retire_work; + + /** + * Are we in a non-interruptible section of code like + * modesetting? + */ + bool interruptible; + + /** + * Flag if the X Server, and thus DRM, is not currently in + * control of the device. + * + * This is set between LeaveVT and EnterVT. It needs to be + * replaced with a semaphore. It also needs to be + * transitioned away from for kernel modesetting. + */ + int suspended; + + /** + * Flag if the hardware appears to be wedged. + * + * This is set when attempts to idle the device timeout. + * It prevents command submission from occurring and makes + * every pending request fail + */ + atomic_t wedged; + + /** Bit 6 swizzling required for X tiling */ + uint32_t bit_6_swizzle_x; + /** Bit 6 swizzling required for Y tiling */ + uint32_t bit_6_swizzle_y; + + /* storage for physical objects */ + struct drm_i915_gem_phys_object *phys_objs[I915_MAX_PHYS_OBJECT]; + + /* accounting, useful for userland debugging */ + size_t gtt_total; + size_t mappable_gtt_total; + size_t object_memory; + u32 object_count; +}; + typedef struct drm_i915_private { struct drm_device *dev; @@ -744,111 +850,7 @@ typedef struct drm_i915_private { /* Register state */ bool modeset_on_lid; - struct { - /** Bridge to intel-gtt-ko */ - struct intel_gtt *gtt; - /** Memory allocator for GTT stolen memory */ - struct drm_mm stolen; - /** Memory allocator for GTT */ - struct drm_mm gtt_space; - /** List of all objects in gtt_space. Used to restore gtt - * mappings on resume */ - struct list_head bound_list; - /** - * List of objects which are not bound to the GTT (thus - * are idle and not used by the GPU) but still have - * (presumably uncached) pages still attached. - */ - struct list_head unbound_list; - - /** Usable portion of the GTT for GEM */ - unsigned long gtt_start; - unsigned long gtt_mappable_end; - unsigned long gtt_end; - - struct io_mapping *gtt_mapping; - phys_addr_t gtt_base_addr; - int gtt_mtrr; - - /** PPGTT used for aliasing the PPGTT with the GTT */ - struct i915_hw_ppgtt *aliasing_ppgtt; - - struct shrinker inactive_shrinker; - - /** - * List of objects currently involved in rendering. - * - * Includes buffers having the contents of their GPU caches - * flushed, not necessarily primitives. last_rendering_seqno - * represents when the rendering involved will be completed. - * - * A reference is held on the buffer while on this list. - */ - struct list_head active_list; - - /** - * LRU list of objects which are not in the ringbuffer and - * are ready to unbind, but are still in the GTT. - * - * last_rendering_seqno is 0 while an object is in this list. - * - * A reference is not held on the buffer while on this list, - * as merely being GTT-bound shouldn't prevent its being - * freed, and we'll pull it off the list in the free path. - */ - struct list_head inactive_list; - - /** LRU list of objects with fence regs on them. */ - struct list_head fence_list; - - /** - * We leave the user IRQ off as much as possible, - * but this means that requests will finish and never - * be retired once the system goes idle. Set a timer to - * fire periodically while the ring is running. When it - * fires, go retire requests. - */ - struct delayed_work retire_work; - - /** - * Are we in a non-interruptible section of code like - * modesetting? - */ - bool interruptible; - - /** - * Flag if the X Server, and thus DRM, is not currently in - * control of the device. - * - * This is set between LeaveVT and EnterVT. It needs to be - * replaced with a semaphore. It also needs to be - * transitioned away from for kernel modesetting. - */ - int suspended; - - /** - * Flag if the hardware appears to be wedged. - * - * This is set when attempts to idle the device timeout. - * It prevents command submission from occurring and makes - * every pending request fail - */ - atomic_t wedged; - - /** Bit 6 swizzling required for X tiling */ - uint32_t bit_6_swizzle_x; - /** Bit 6 swizzling required for Y tiling */ - uint32_t bit_6_swizzle_y; - - /* storage for physical objects */ - struct drm_i915_gem_phys_object *phys_objs[I915_MAX_PHYS_OBJECT]; - - /* accounting, useful for userland debugging */ - size_t gtt_total; - size_t mappable_gtt_total; - size_t object_memory; - u32 object_count; - } mm; + struct i915_gem_mm mm; /* Kernel Modesetting */