From patchwork Tue Nov 20 15:27:35 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paulo Zanoni X-Patchwork-Id: 1774391 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id A63D6DF230 for ; Tue, 20 Nov 2012 15:28:43 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8A7EDE633A for ; Tue, 20 Nov 2012 07:28:43 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-ye0-f177.google.com (mail-ye0-f177.google.com [209.85.213.177]) by gabe.freedesktop.org (Postfix) with ESMTP id 0AFF2E630F for ; Tue, 20 Nov 2012 07:27:59 -0800 (PST) Received: by mail-ye0-f177.google.com with SMTP id q13so440867yen.36 for ; Tue, 20 Nov 2012 07:27:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=CQCYqRit+9sRuLwuXwpymW40f0uqHF3oWJXShrD2ipg=; b=hbgxamReUAKo379orTIKdWgn4KXKqKRv2WfU0bO7wkBxBNZAb8X362/o0pBmJykr13 MDUhpPIYojV4Li5TbX2gRGg98Lzqyh9RSUnq3PDtiTA0gsVki63R3Qi9tbWfQiYcVVzz jL2+NEfHitT+015/vtywZ1MFb1kDxMUCHYEWPPoc7KBZFbu6CRvZaUxms47qNZeW4W9/ Wc/7Rexy+I+FQTGJ/bXBUJv/cFbqWKAPuR/S+246pvUXQ5jCIK7Lt60mVjX2zzSbHfYI Ca26K5z8tmtfrdXMDP3Isoqp09okA/7B0MdLKykHgZq1ive7o3+bUWhFbADw/oXADYcg THtA== Received: by 10.236.74.106 with SMTP id w70mr15313433yhd.68.1353425279256; Tue, 20 Nov 2012 07:27:59 -0800 (PST) Received: from vicky.domain.invalid ([177.156.19.106]) by mx.google.com with ESMTPS id a7sm13068544yhe.14.2012.11.20.07.27.55 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 20 Nov 2012 07:27:56 -0800 (PST) From: Paulo Zanoni To: intel-gfx@lists.freedesktop.org Date: Tue, 20 Nov 2012 13:27:35 -0200 Message-Id: <1353425264-3728-2-git-send-email-przanoni@gmail.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1353425264-3728-1-git-send-email-przanoni@gmail.com> References: <1353425264-3728-1-git-send-email-przanoni@gmail.com> Cc: Paulo Zanoni Subject: [Intel-gfx] [PATCH 01/10] drm/i915: don't limit Haswell CRT encoder to pipe A X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org From: Paulo Zanoni This is a full revert of 59c859d6f2e78344945e8a8406a194156176bc4e: drm/i915: account for only one PCH receiver on Haswell Now that the PCH code is fixed to be able use the only PCH transcoder independently of the pipe and CPU transcoder, we can revert this. Signed-off-by: Paulo Zanoni Reviewed-by: Damien Lespiau --- drivers/gpu/drm/i915/intel_crt.c | 5 +---- drivers/gpu/drm/i915/intel_display.c | 15 +++------------ 2 files changed, 4 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c index 1c97c27..124fd78 100644 --- a/drivers/gpu/drm/i915/intel_crt.c +++ b/drivers/gpu/drm/i915/intel_crt.c @@ -764,10 +764,7 @@ void intel_crt_init(struct drm_device *dev) crt->base.type = INTEL_OUTPUT_ANALOG; crt->base.cloneable = true; - if (IS_HASWELL(dev)) - crt->base.crtc_mask = (1 << 0); - else - crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); + crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); if (IS_GEN2(dev)) connector->interlace_allowed = 0; diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 923d299..0102931 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1149,14 +1149,9 @@ static void assert_fdi_rx(struct drm_i915_private *dev_priv, u32 val; bool cur_state; - if (IS_HASWELL(dev_priv->dev) && pipe > 0) { - DRM_ERROR("Attempting to enable FDI_RX on Haswell pipe > 0\n"); - return; - } else { - reg = FDI_RX_CTL(pipe); - val = I915_READ(reg); - cur_state = !!(val & FDI_RX_ENABLE); - } + reg = FDI_RX_CTL(pipe); + val = I915_READ(reg); + cur_state = !!(val & FDI_RX_ENABLE); WARN(cur_state != state, "FDI RX state assertion failure (expected %s, current %s)\n", state_string(state), state_string(cur_state)); @@ -1189,10 +1184,6 @@ static void assert_fdi_rx_pll_enabled(struct drm_i915_private *dev_priv, int reg; u32 val; - if (IS_HASWELL(dev_priv->dev) && pipe > 0) { - DRM_ERROR("Attempting to enable FDI on Haswell with pipe > 0\n"); - return; - } reg = FDI_RX_CTL(pipe); val = I915_READ(reg); WARN(!(val & FDI_RX_PLL_ENABLE), "FDI RX PLL assertion failure, should be active but is disabled\n");